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17:46, 24 November 2024 Asie talk contribs created page WonderWitch/Flash (Created page with "The WonderWitch cartridge features a 512KiB flash chip - the MBM29DL400TC. While the WonderSwan SoC pervents writes to the ROM area, it can be written to via the SRAM area using port $CE on the Bandai 2003 mapper. TODO: Document commands. == Links == * [https://github.com/up-n-atom/WonderWitch/blob/main/Datasheets/MBM29DL400BC-12PFTN_to_MBM29DL400TC-90PFTN.pdf Datasheet]")
16:39, 20 October 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/System (Created page with "The System interrupt provides assorted system-related functionality. == Types == === Suspend/resume structure === This structure is stored in SRAM block 3, offset <code>$7E00</code> (core 1) and <code>$BF00</code> (core 0). {| class="wikitable" |- ! Offset !! Size !! Contents |- | $0000 || 16384 || Copy of RAM area <code>$0000</code> - <code>$3FFF</code> |- | $4000 || 2 || Stack segment? |- | $4002 || 2 || Data segment? |- | $4004 || 224 || Copy of IO ports <code>$00...")
19:13, 19 October 2024 Asie talk contribs created page WonderWitch/Memory map (Created page with "== Memory map == {| class="wikitable" |+ WonderWitch memory map ! Address ! ASCII, 1 screen ! ASCII, 2 screens ! Shift-JIS, 1 screen ! Shift-JIS, 2 screens |- | style="text-align: center;" | 0x0000 | colspan="4" style="text-align: center;" | Interrupt vectors |- | style="text-align: center;" | 0x0100 | colspan="4" style="text-align: center;" | ? |- | style="text-align: center;" | 0x0E00 | rowspan="7" style="text-align: center;" | | rowspan="5" style="text-align: center;...")
12:51, 19 October 2024 Asie talk contribs created page WonderWitch/IL/IlibIL (Created page with "IlibIL is a library used to load other indirect libraries present on the system. == Functions == === open === <code>int open(const char far *name, IL far *buffer);</code> Load the specified IL <code>name</code> from <code>/rom0</code> or <code>/kern</code>. The IL header is copied to the provided <code>buffer</code> with addresses appropriately relocated to match the IL's location in ROM. === open_system === <code>int open_system(const char far *name, IL far *buffe...")
12:01, 19 October 2024 Asie talk contribs created page WonderWitch/IL/ResumeIL (Created page with "== ResumeIL == ResumeIL is a library which augments the process suspend/resume functionality of the built-in ProcIL library to also archive the memory areas <code>0x4000 - 0xBFFF</code> (WSC expanded/4bpp tile memory) and <code>0xFE00 - 0xFFFF</code> (WSC palette memory). This is done by copying this memory to <code>/ram0/resume.dat</code>. === Limitations === - This approach only allows suspending and resuming one process.")
11:19, 19 October 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Timer (Created page with "The Timer interrupt provides an abstraction layer for the WonderSwan's timers, as well as the on-cartridge RTC. == Types == === RTC fields === The RTC field indexes match the order of fields returned by the RTC chip. Note that FreyaBIOS transparently converts the values to and from BCD. {| class="wikitable" |- ! Index !! Data !! Format |- | 0 || Year || 0 - 99; 0 is assumed to be the year 2000. |- | 1 || Month || 1 - 12 |- | 2 || Date...")
18:02, 18 October 2024 Asie talk contribs created page WonderWitch/Process (Created page with "== Memory layout == Process memory is stored in SRAM banks 3 (process 0 - typically used by FreyaOS), 2 (process 1) and 1 (process 2). The entire bank is available to the process. === Process control block === The process control block contains information about the running process. It is stored in the first 96 bytes of data. {| class="wikitable" |+ Process control block structure |- ! Offset !! Length !! Contents |- | 0 || 4 || Compiler ID, zero-terminated string; s...")
15:53, 18 October 2024 Asie talk contribs created page WonderWitch/IL (Created page with "Indirect libraries (IL) are a FreyaOS feature designed to work around the 64KB segment limit of applications by offloading helper functionality to separate library binaries. == Calling convention == All functions exposed by an IL use the standard 8086 C calling convention - cdecl. * The stack is allocated and cleaned by the caller. * <code>AX</code>, <code>BX</code>, <code>CX</code>, <code>DX</code> can be modified freely by the callee. All other registers must be res...")
14:21, 17 October 2024 Asie talk contribs created page WonderWitch/Filesystem (Created page with "== Mount points == {| class="wikitable" |+ FreyaOS mount points |- ! Path !! File data location !! File table location !! File table size (entries) !! Description |- | <code>/rom0</code> || ROM (384 KB) || SRAM bank 3, $16F2 || 128 || |- | <code>/ram0</code> || SRAM bank 0 (64 KB) || SRAM bank 3, $06F2 || 64 || |- | <code>/</code> || || SRAM bank 3, $02F2 || 16 || |} == File table entry format == {| class="wikitable" |+ Header contents |- ! Offset !! Length !! Conten...")
07:57, 15 August 2024 Asie talk contribs created page NEC V30MZ interrupts (Created page with "The NEC V30MZ provides six of the eight interrupts provided by the 80186. == Interrupts == === INT 0 - Divide Error === This interrupt is emitted as the result of a DIVIDIV or DIVUDIV instruction. === INT 1 - Single Step/Break === This interrupt is emitted if the single step flag is set after executing an instruction. (The instruction which changed the single step flag is ignored.) The single step flag is cleared for the duration of the interru...")
09:36, 5 August 2024 Asie talk contribs created page NEC V30MZ registers (Created page with "= NEC V30MZ registers = * Four 16-bit general-purpose registers, with their (low, high) components accessible as individual 8-bit sub-registers: ** '''AX'''AW ('''AL''', '''AH''') - the ''accumulator'' register, ** '''BX'''BW ('''BL''', '''BH''') - the ''base'' register, ** '''CX'''CW ('''CL''', '''CH''') - the ''count'' register, ** '''DX'''DW ('''DL''', '''DH''') - the ''data'' register, * Four additional 16-bit registers: *...")
09:36, 5 August 2024 Asie talk contribs created page NEC V30MZ flags (Created page with " = NEC V30MZ flags = == Layout == The V30MZ processor features a 16-bit flag register: 15 bit 8 7 bit 0 ---- ---- ---- ---- m111 odit sz0a 0p1c | |||| || | | | | |||| || | | +- Carry (CFCY) | |||| || | +--- Parity (PFP) | |||| || +------ Auxillary Carry (AFAC) | |||| |+-------- Zero (Z) | |||| +--------- Sign (S) | |||+------------ Single StepBreak (TFBRK)...")
20:37, 30 July 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Bank (Created page with "The Bank interrupt provides an abstraction layer for accessing the WonderWitch cartridge's flash and RAM. == Interrupts == === INT $18/AH=$00 - bank_set_map === * AH = $00 * BX = Bank region * CX = Number of bank to map to region Bank regions: * 0 = SRAM (1000:xxxx) * 1 = ROM0 (2000:xxxx) * 2 = ROM1 (3000:xxxx) === INT $18/AH=$01 - bank_get_map === * AH = $01 * BX = Bank region Return: * AX = Number of bank mapped to region === INT $18/AH=$02 - bank_read_byte =...")
13:42, 27 July 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Communication (Created page with "The Communication (comm) interrupt provides an abstraction layer and helpers for the WonderSwan's serial port. == Interrupts == === INT $14/AH=$00 - comm_open === * AH = $00 Opens the serial port. Note that the baud rate must be set before calling <code>comm_open</code>. === INT $14/AH=$01 - comm_close === * AH = $01 Closes the serial port. === INT $14/AH=$02 - comm_send_char === * AH = $02 * BL = Character (byte) to send. Return: * AX = Return code....")
08:34, 27 July 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Text (Created page with "The Text interrupt provides a text output display using one of the WonderSwan's screens. == Interrupts == === INT $13/AH=$00 - text_screen_init === * AH = $00 Initializes a text window (see INT $13/AH=$01) with the following default settings: * X, Y = 0, 0 * width, height = 28, 18 * starting tile = 512 - font tile count (in ASCII mode) * starting tile = 512 - (width x height) (in Shift-JIS and mixed modes) === INT $13/AH=$01 - text_window_init === * AH = $01 * BL...")
16:08, 24 July 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Key (Created page with "The Display interrupt provides helper functions for accessing the WonderSwan's keypad. == Interrupts == === INT $11/AH=$00 - key_press_check === * AH = $00 Return: * AX = A bitmask containing the currently held keys. <pre> 15 bit 8 7 bit 0 ---- ---- ---- ---- .... 4321 4321 bas. |||| |||| ||| |||| |||| ||+- Start |||| |||| |+-- A |||| |||| +--- B |||| ++++----- X1/X2/X3/X4 ++++----------- Y1/Y2/Y3/Y4 </pr...")
20:27, 23 July 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Display (Created page with "The Display interrupt provides an abstraction layer and helpers for the WonderSwan's display hardware. Note that features specific to the WonderSwan Color are implemented using libwwc, which is linked statically with the user program and thus not part of the BIOS call surface. == Interrupts == === INT $12/AH=$00 - display_control === * AH = $00 * BX = Display Control value === INT $12/AH=$01 - display_st...")
08:18, 20 July 2024 Asie talk contribs created page WonderWitch/FreyaBIOS/Sound (Created page with "The Sound interrupt provides an abstraction layer for the WonderSwan's sound hardware. == Interrupts == === INT 15/AH=00h - sound_init === * AH = 00h === INT 15/AH=01h - sound_set_channel === * AH = 01h * BL = Channel Control value === INT 15/AH=02h - sound_get_channel === * AH = 02h Return: * AL = Channel Control value === INT 15/AH=03h - sound_set_output === * AH = 03h * BL = Sound#S...")
05:54, 17 March 2024 Asie talk contribs created page WonderWitch/FreyaOS (Created page with "FreyaOS is an operating system and library set for WonderWitch, present in the second-to-last 64 KB of any WonderWitch cartridge. It provides the following library functionality: * process management, * file system access, * IL library management. It additionally provides an user interface, which allows launching programs and performing file management/transfer operations. == Revisions == * FreyaOS 1.0.0 * FreyaOS 1.0.2 (September 2nd, 2000 <r...")
19:55, 19 February 2024 Asie talk contribs moved page Cartridge pinout to Cartridge connector (Unify with NESdev/SNESdev Wiki standards)
07:44, 27 August 2023 Asie talk contribs created page WonderBeat 9480 (stub)
16:55, 25 August 2023 Asie talk contribs created page SoC (Created page with "The WonderSwan SoC is a single-chip solution powering the entirety of the system's hardware - containing the CPU, most peripheral logic, as well as the internal RAM. There exist three variants of the SoC: * ASWAN, used in the WonderSwan, * SPHINX, used in the WonderSwan Color, * SPHINX2, used in the SwanCrystal. A fourth variant, CAIRO, was planned. It was designed as an ASWAN with a doubled clock speed and a built-in ADPCM decoder, but was never licensed for a commer...")
16:48, 25 August 2023 Asie talk contribs created page Cartridge (Created page with "== Cartridge bus == The cartridge bus allows both memory access (to linear addresses 0x10000-0xFFFFF) and I/O access (to ports 0xC0-0xFF). To facilitate this, the Memory/IO pin is used: * When Memory/IO is asserted '''high''', all bus address pins specify the 20-bit linear memory address. * When Memory/IO is asserted '''low''', bus address pins 0-7 specify the port address bits 0-7, bus address pins 8-15 are low, bus address pins 16-19 specify the port address bits 4-...")
16:44, 25 August 2023 Asie talk contribs created page Cartridge pinout (Created page with " == Pinout == <pre> Cartridge Console (label side) (back) ____________ |====| ____ |--01| -- GND ... \ | -02| <- CPU A15 ... | | -03| <- CPU A10 ... | | -04| <- CPU A11 ... | | -05| <- CPU A9 ... | | -06| <- CPU A8 ... | | -07| <- CPU A13 ... | | -08| <- CPU A14 ... | | -09| <- CPU A12 ... | | -10| <- CPU A7 ... | | -11| <- CPU A6 ... | | -12| <- CPU A5 ... | | -13| <- CPU A4 ... | | -14| <> D15 ... | | -15| <> D14 ... | |...")
09:29, 25 August 2023 Asie talk contribs created page Accessory port pinout (Created page with "The WonderSwan accessory (EXT) port provides an UART serial port and I2S digital audio output. == Pinout == (Female 8-pin port on peripheral) <pre> MISO_ _MOSI \ / +3V_ \ / _GND ______\ __\ __ /__ /______ | 04__03__02__01 | | __|"" "" "" ""|__ | | |__ __| | '. |..__..__..__..| .' \____05__06__07__08____/ _/ / \ \_ BCLK /...")
06:16, 25 August 2023 Asie talk contribs created page WonderWitch/FreyaBIOS (Created page with "FreyaBIOS is a boot program and hardware abstraction layer for WonderWitch, present in the top-most (last) 64 KB of any WonderWitch cartridge. It provides the following functionality: * bring-up code, * interrupt-based hardware abstraction layer, providing a more user-friendly (and less direct) interface to the WonderSwan hardware, * a monitor program, allowing FreyaOS recovery and updates via XMODEM. Other functionality (like file system access) is instead includ...")
06:10, 25 August 2023 Asie talk contribs created page WonderWitch (Created page with "The WonderWitch is an official homebrew development kit released by Qute Corporation on July 18th, 2000. == Hardware == The WonderWitch cartridge is based on the Bandai 2003 mapper. It provides an RTC, as well as NOR self-flashing functionality using the Fujitsu MBM29DL400TC chip. There were three ways available to acquire WonderWitch cartridges: * '''WonderWitch''', a software development kit containing a reflashable cartridge, a WonderSwan<->RS-232 adapter, a d...")
16:27, 23 August 2023 Asie talk contribs created page NEC V30MZ (Created page with "The NEC V30MZ is the CPU component of the WonderSwan SoC. == Sections == * CPU undocumented behavior == Links == * [https://www.ardent-tool.com/CPU/docs/NEC/V20-V30/v30mz.pdf NEC V30MZ datasheet]")
18:15, 22 August 2023 Asie talk contribs created page Frame timing (Created page with "Notes: * Sprite indices are given negatively. Sprites are filtered for every line, and are drawn from last found to first found. * Fetches may be off by one cycle. This stuff is complicated. {| class="wikitable" ! rowspan="2" | Cycle ! rowspan="2" | CPU ! colspan="4" | PPU ! rowspan="2" | APU ! rowspan="2" | Palette |- ! Mono/2BPP ! Color/2BPP ! Color/4BPP ! Line 144 |- | 0 | rowspan="117" style="vertical-align:top;" | V30MZ ! rowspan="256" style="text-align: center;"...")
16:41, 22 August 2023 Asie talk contribs created page EEPROM (Created page with "The WonderSwan utilizes M93LCx6-compatible EEPROMs: * in the SoC: ** 1 Kbit internal EEPROM (M93LC46-compatible) on the WonderSwan, ** 16 Kbit internal EEPROM (M93LC86-compatible) on the WonderSwan Color, * on cartridges: ** 1 Kbit cartridge EEPROM (M93LC46-compatible) ** 8 Kbit cartridge EEPROM (M93LC76-compatible) ** 16 Kbit cartridge EEPROM (M93LC86-compatible) Additional variants exists which were not seen on any production cartridge: * 2 Kbit EEPROM (M93LC56-comp...")
14:09, 22 August 2023 Asie talk contribs created page Splash animation (Created page with "The WonderSwan Color upgraded the internal EEPROM from 128 bytes to 2 kilobytes; most of the additional space is utilized to allow for branding consoles in the form of unique, custom splash animations on console startup. == Format == {| class="wikitable" |- ! Offset !! Length !! Contents |- | $83 || 1 || WSC-specific configuration. Bit 7 enables custom splash animation. |- | $84 || 1 || Name color |- | $85 || 1 || Must be $00 |- | $86 || 1 || Size; 0 = ends...")
12:35, 22 August 2023 Asie talk contribs created page DMA (Created page with "The WonderSwan Color introduced two DMA blocks: * General DMA (GDMA) - allowing for fast IRAM/ROM -> IRAM transfers, * Sound DMA (SDMA) - allowing for IRAM/ROM -> sound transfers in a much less CPU-intensive way than an interrupt. == General DMA == {{Anchor|GDMA Source Address Low}} {{Anchor|GDMA Source Address High}} === GDMA Source Address ($40, $41, $42) === <pre> 23 bit 16 15 bit 8 7 bit 0 ---- ---- ---- ---- ---- ---- .... hhhh llll llll llll llll...")
12:20, 22 August 2023 Asie talk contribs created page Hyper Voice (Created page with "Hyper Voice is a headphone-only sample output channel introduced with the WonderSwan Color. It allows converting 8-bit signed and unsigned, mono and stereo samples into 16-bit signed PCM sent directly to the headphone output, after mixing with the traditional four channels. == I/O Ports == === Hyper Voice Left Output ($64, $65) === === Hyper Voice Right Output ($66, $67) === <pre> 15 bit 8 7 bit 0 ---- ---- ---- ---- ssss ssss ssss ssss ++++-++++--++++-++++...")
10:00, 22 August 2023 Asie talk contribs created page Sound (Created page with "The WonderSwan features the following sound hardware: * Four audio channels: ** channel 1 - wavetable (32 x 4-bit samples), ** channel 2 - wavetable or 8-bit unsigned PCM sample, ** channel 3 - wavetable with optional hardware sweep, ** channel 4 - wavetable or LFSR noise, * Hyper Voice(color) - headphone output exclusive 16-bit stereo PCM output, * 24000 Hz output: ** internal speaker - 8-bit, mono, ** headphone output - 16-bit, stereo. The sound is mix...")
08:16, 22 August 2023 Asie talk contribs created page Display (initial page)
06:44, 22 August 2023 Asie talk contribs created page Memory map (Created page with "The WonderSwan's SoC enforces the following memory map layout: {| class="wikitable" |+ WonderSwan SoC linear memory map ! Bus ! colspan="2" | Address range ! Access width ! Access speed ! Read/Write |- | Internal | colspan="2" style="text-align: center;" | 0x00000 0x0FFFF | 16-bit | 1 cycle | RW |- | rowspan="2" | Cartridge | rowspan="2" style="text-align: center;" | 0x10000 0xFFFFF | style="text-align: center;" | 0x10000 0x1FFFF | 8-bit | ??? | RW |- | styl...")
05:51, 22 August 2023 Asie talk contribs created page Timers (Created page with "The WonderSwan features two timers: * Horizontal Blank Timer - counts down every horizontal blank (256 CPU cycles), * Vertical Blank Timer - counts down every frame. The timers also feature an auto-reload functionality: that is, they can be configured to fire one time or repeat periodically. == Interrupts == Each timer has its own interrupt; it is triggered when the counter would be about to count down to zero, that is when the counter's value is 1 and the timer cond...")
05:40, 22 August 2023 Asie talk contribs created page UART (Created page with "The WonderSwan's EXT port features an UART operating with the following configuration: * 9,600 or 38,400 bps (bauds per second), * 8N1 (8 data bits followed by 1 stop bit, no parity). This allows for an effective maximum transfer speed of ~1066 or ~4266 bytes per second, respectively. The hardware also features a one-byte transmit and receive buffer, which allows for a slight delay in code when handling data to/from the console. == Interrupts == The UART features tw...")
05:31, 22 August 2023 Asie talk contribs created page Interrupts (Created page with "The WonderSwan features fourteen different interrupts: * CPU interrupts - six provided by the V30MZ CPU ($00-$05), * Hardware interrupts - eight provided by the SoC's hardware ($00-$07, or $08-$0F, or $10-$1F, or ... $F8-$FF - controlled by an offset <code>V</code>): ** Level - will be reissued so long as the prerequisite condition is raised or the interrupt is disabled, ** Edge - will only be issued once; acknowledging the interrupt prevents reissuing until the conditi...")
18:07, 19 August 2023 Asie talk contribs created page WonderWave (Created page with "The WonderWave is an infrared adapter for the WonderSwan. It is implemented as a bi-directional 9600 bps converter between IrDA and the WonderSwan's UART <ref>[http://www.wonderwitch.com/neta/waza035/index.html 技その35「WonderWaveでファイル転送」]</ref>. == Notes == <references />")
11:17, 19 August 2023 Asie talk contribs created page WonderGate/bplXX.mopera.ne.jp (Created page with "For the MobileWonderGate software, NTT DoCoMo operated network servers for validating and redirecting URL requests: * <code>bpl01.mopera.ne.jp</code> * <code>bpl02.mopera.ne.jp</code> == Packet format == Every packet sent from and to the server follows the same format: a global header, followed by an arbitrary number of blocks with their respective headers. The client expects one block in response from the server. === Header === {| class="wikitable" ! Offset ! Leng...")
11:07, 19 August 2023 Asie talk contribs created page WonderGate (Created page with "== WonderGate == TODO === Servers === {| class="wikitable" |+ WonderGate servers |- ! Hostname !! Software |- | bplXX.mopera.ne.jp || MobileWonderGate (browser) |}")
09:28, 17 August 2023 Asie talk contribs created page Keypad (Created page with "The WonderSwan SoC features a 4 by 3 keypad matrix. == Scanning == Scanning is done via writing to and reading from port $B5. <pre> 7 bit 0 ---- ---- .iii oooo ||| ++++- Output rows (0-3) +++------ Input rows (4-6) </pre> The standard procedure is to read rows 4, 5 and 6 in order, shifting their values into one twelve-bit mask like so: <pre> 15 bit 0 ---- ---- ---- ---- .... 4444 5555 6666 </pre> Typical keypad scanning implementations introduce a d...")
22:31, 16 August 2023 Asie talk contribs created page I/O port map (Created page with "* Superscripts are used to mark ports specific to a given mode or platform: ** Color mode: (color). ** WS/WSC/SC console: (WS), (WSC), (SC). * If two Bits rows are provided, the second one refers to the "Color" mode. * The Type can be: R - readable, W - writable, L - writable before boot ROM lockout, 8/16 - width (byte/word). {| class="wikitable" ! Category ! Port ! Description ! Bits ! Type ! Notes |- ! rowspan="45" | Displ...")
13:17, 15 August 2023 Asie talk contribs created page Timing (Created page with "== Clocks == The WonderSwan is clocked with a master clock of approximately 12288000 Hz (= 12.288 MHz). This clock is split into four internal memory access quadrants, running at 3072000 Hz (= 3.072 MHz) each. Three of those are used by the console in "mono" mode: NEC V30MZ, Display and Sound. On the WonderSwan Color, the fourth quadrant is used to handle color palette reads during display drawing. Out of those, only the CPU quadrant can access the car...")
06:17, 15 August 2023 Asie talk contribs created page WonderWitch .fx files (Created page with "FreyaOS uses XMODEM transfers to send and receive files through the serial port. These transfers do not include any file metadata by default - such as the file's name, size, permissions or creation date. As such, .fx files are used - binary files with a special 128-byte header<ref>XMODEM transfers are performed in 128-byte blocks; this allows fetching the file's metadata as the first block</ref>. == Format == {| class="wikitable" |+ Header contents |- ! Offset...")
06:04, 15 August 2023 Asie talk contribs created page ROM header (Created page with "Every WonderSwan ROM contains a header. It is stored at the end - final sixteen bytes - of the ROM image. == ROM header == Parts of this header are validated or otherwise used by the console's boot ROM - they are marked in '''bold'''. {| class="wikitable" |+ Header contents |- ! Offset !! Length !! Contents |- | '''$0''' || '''5''' || Far jump instruction: '''0xEA''', offset, segment. |- | '''$5''' || '''1''' || '''Maintenance''' |- | $6 || 1 || Developer/Publishe...")

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