NEC V30MZ instruction set

Note that this page is a work in progress.

Official V30MZ (80186) Instructions

AAA	AAD	AAM	AAS	ADC	ADD	AND	BOUND	CALL	CBW	CLC
CLD	CLI	CMC	CMP	CMPSB	CMPSW	CS	CWD	DAA	DAS	DEC
DIV	DS	ENTER	ES	HLT	IDIV	IMUL	IN	INC	INSB	INSW
INT	INTO	IRET	JA	JBE	JC	JCXZ	JG	JGE	JL	JLE
JMP	JNC	JNO	JNP	JNS	JNZ	JO	JP	JS	JZ	LAHF
LDS	LEA	LEAVE	LES	LOCK	LODSB	LODSW	LOOP	LOOPE	LOOPNE	MOV
MOVSB	MOVSW	MUL	NEG	NOP	NOT	OR	OUT	OUTSB	OUTSW	POLL
POP	POPA	POPF	PUSH	PUSHA	PUSHF	RCL	RCR	REP	REPNE	RET
RETF	ROL	ROR	SAHF	SAR	SBB	SCASB	SCASW	SHL	SHR	SS
STC	STD	STI	STOSB	STOSW	SUB	TEST	XCHG	XLAT	XOR

Official instructions by type

Type	Instructions
Memory	MOV	XCHG	XLAT	LEA	LDS	LES	IN	OUT
Ports	IN	OUT	INSB	OUTSB	INSW	OUTSW
Arithmetic	ADD	SUB	ADC	SBB	INC	DEC	MUL	DIV	IMUL	IDIV	CMP	NEG
Numeric	CBW	CWD	AAA	AAS	AAM	AAD	DAA	DAS
Shift	ROL	ROR	RCL	RCR	SHL	SHR	SAR
Bitwise	AND	OR	XOR	NOT	TEST
Branch	JC	JNC	JZ	JNZ	JBE	JA	JO	JNO	JP	JNP	JS	JNS	JL	JGE	JLE	JG
Jump	JMP	CALL	RET	RETF
Loop	LOOP	LOOPE	LOOPNE
Interrupt	INT	IRET	INTO	HLT	BOUND
Stack	PUSH	POP	PUSHA	POPA	PUSHF	POPF
Flags	CLC	STC	CLD	STD	CLI	STI	CMC	LAHF	SAHF
Prefix	CS	DS	ES	SS
String	REP	REPE	REPNE	MOVSB	MOVSW	LODSB	STOSB	LODSW	STOSW	CMPSB	SCASB	CMPSW	SCASW
Other	NOP	ENTER	LEAVE	LOCK	POLL

Instruction encoding

ModR/M byte

The ModR/M byte is used in most addressing modes which reference a memory location. This byte consists of three bitfield values:

• oo - Mode;
• rrr - Two possible functions:
  • Register (for addressing modes which require both a register and a register/memory operand),
  • Opcode extension (for some opcodes' addressing modes which do not have such a requirement);
• mmm - Register/Memory.

The Mode and Register/Memory bitfields can refer to a memory location or to a register, as shown in the table below. In some addressing modes, the Register field also refers to a register; it is always interpreted as if Mode was equal to 11.

R/M \ Mode	00	01	10	11 (byte)	11 (word)
000	DS:[BX + SI]	DS:[BX + SI + disp8]	DS:[BX + SI + disp16]	AL	AX
001	DS:[BX + DI]	DS:[BX + DI + disp8]	DS:[BX + DI + disp16]	CL	CX
010	SS:[BP + SI]	SS:[BP + SI + disp8]	SS:[BP + SI + disp16]	DL	DX
011	SS:[BP + DI]	SS:[BP + DI + disp8]	SS:[BP + DI + disp16]	BL	BX
100	DS:[SI]	DS:[SI + disp8]	DS:[SI + disp16]	AH	SP
101	DS:[DI]	DS:[DI + disp8]	DS:[DI + disp16]	CH	BP
110	DS:[disp16]	SS:[BP + disp8]	SS:[BP + disp16]	DH	SI
111	DS:[BX]	DS:[BX + disp8]	DS:[BX + disp16]	BH	DI

Displacements are either 8-bit (disp8) or 16-bit (disp16) signed values and they always immediately follow the ModR/M byte. Note that (oo = 00, mmm = 110) is a special case, in which the disp16 value is used directly as a near pointer.

The instruction encoding lists below refer to this byte as oorrrmmm (binary), /r (hexadecimal) or /0 (hexademical, rrr used as function 0).

Official instructions

AAA

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
AAA	37	00110111	1	9

---

AAD

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
AAD imm8	B5 ii	11010100 iiiiiiii	2	6

---

AAM

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
AAM imm8	B4 ii	11010100 iiiiiiii	2	17

---

AAS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
AAS	3F	00111111	1	9

---

ADC

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
ADC AL, imm	14 ii	00010100 iiiiiiii	2	1
ADC AX, imm	15 ii ii	00010101 iiiiiiii iiiiiiii	3	1
ADC mem8, imm8	80 /2 ii	10000000 oo010mmm iiiiiiii	3+	3
ADC mem16, imm16	81 /2 ii ii	10000001 oo010mmm iiiiiiii iiiiiiii	4+	3
ADC mem16, simm8	83 /2 ii	10000011 oo010mmm iiiiiiii	3+	3
ADC mem8, reg8	10 /r	00010000 oorrrmmm	2+	3
ADC mem16, reg16	11 /r	00010001 oorrrmmm	2+	3
ADC reg8, imm8	80 /2 ii	10000000 11010mmm iiiiiiii	3	1
ADC reg16, imm16	81 /2 ii ii	10000001 11010mmm iiiiiiii iiiiiiii	4	1
ADC reg16, simm8	83 /2 ii	10000011 11010mmm iiiiiiii	3	1
ADC reg8, mem8	12 /r	00010010 oorrrmmm	2+	2
ADC reg16, mem16	13 /r	00010011 oorrrmmm	2+	2
ADC reg8, reg8	10 /r	000100.0 11rrrmmm	2	1
ADC reg16, reg16	11 /r	000100.1 11rrrmmm	2	1

---

ADD

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
ADD AL, imm	04 ii	00000100 iiiiiiii	2	1
ADD AX, imm	05 ii ii	00000101 iiiiiiii iiiiiiii	3	1
ADD mem8, imm8	80 /0 ii	10000000 oo000mmm iiiiiiii	3+	3
ADD mem16, imm16	81 /0 ii ii	10000001 oo000mmm iiiiiiii iiiiiiii	4+	3
ADD mem16, simm8	83 /0 ii	10000011 oo000mmm iiiiiiii	3+	3
ADD mem8, reg8	00 /r	00000000 oorrrmmm	2+	3
ADD mem16, reg16	01 /r	00000001 oorrrmmm	2+	3
ADD reg8, imm8	80 /0 ii	10000000 11000mmm iiiiiiii	3	1
ADD reg16, imm16	81 /0 ii ii	10000001 11000mmm iiiiiiii iiiiiiii	4	1
ADD reg16, simm8	83 /0 ii	10000011 11000mmm iiiiiiii	3	1
ADD reg8, mem8	02 /r	00000010 oorrrmmm	2+	2
ADD reg16, mem16	03 /r	00000011 oorrrmmm	2+	2
ADD reg8, reg8	00 /r	000000.0 11rrrmmm	2	1
ADD reg16, reg16	01 /r	000000.1 11rrrmmm	2	1

---

AND

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
AND AL, imm	24 ii	00100100 iiiiiiii	2	1
AND AX, imm	25 ii ii	00100101 iiiiiiii iiiiiiii	3	1
AND mem8, imm8	80 /4 ii	10000000 oo100mmm iiiiiiii	3+	3
AND mem16, imm16	81 /4 ii ii	10000001 oo100mmm iiiiiiii iiiiiiii	4+	3
AND mem16, simm8	83 /4 ii	10000011 oo100mmm iiiiiiii	3+	3
AND mem8, reg8	20 /r	00100000 oorrrmmm	2+	3
AND mem16, reg16	21 /r	00100001 oorrrmmm	2+	3
AND reg8, imm8	80 /4 ii	10000000 11100mmm iiiiiiii	3	1
AND reg16, imm16	81 /4 ii ii	10000001 11100mmm iiiiiiii iiiiiiii	4	1
AND reg16, simm8	83 /4 ii	10000011 11100mmm iiiiiiii	3	1
AND reg8, mem8	22 /r	00100010 oorrrmmm	2+	2
AND reg16, mem16	23 /r	00100011 oorrrmmm	2+	2
AND reg8, reg8	20 /r	001000.0 11rrrmmm	2	1
AND reg16, reg16	21 /r	001000.1 11rrrmmm	2	1

---

BOUND

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
BOUND reg16, mem16:16	62 /r	01100010 oorrrmmm	2+	13 (20 if condition met)

---

CALL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CALL ptr16:16	CA oo oo ss ss	10011010 oooooooo oooooooo ssssssss ssssssss	5	10
CALL mem16	FF /2	11111111 oo010mmm	2+	6
CALL mem16:16	FF /3	11111111 oo011mmm	2+	12
CALL reg16	FF /2	11111111 11010mmm	2	5
CALL rel16	E8 ii ii	11101000 iiiiiiii iiiiiiii	3	5

---

CBW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CBW	98	10011000	1	1

---

CLC

Flag	New value
CF - Carry	0

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CLC	F8	11111000	1	4

---

CLD

Flag	New value
DF - Direction	0

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CLD	FC	11111100	1	4

---

CLI

Flag	New value
IF - Interrupt	0

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CLI	FA	11111010	1	4

---

CMC

Flag	New value
CF - Carry	!CF

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CMC	F5	11110101	1	4

---

CMP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CMP AL, imm	3C ii	00111100 iiiiiiii	2	1
CMP AX, imm	3D ii ii	00111101 iiiiiiii iiiiiiii	3	1
CMP mem8, imm8	80 /7 ii	10000000 oo111mmm iiiiiiii	3+	2
CMP mem16, imm16	81 /7 ii ii	10000001 oo111mmm iiiiiiii iiiiiiii	4+	2
CMP mem16, simm8	83 /7 ii	10000011 oo111mmm iiiiiiii	3+	2
CMP mem8, reg8	38 /r	00111000 oorrrmmm	2+	2
CMP mem16, reg16	39 /r	00111001 oorrrmmm	2+	2
CMP reg8, imm8	80 /7 ii	10000000 11111mmm iiiiiiii	3	1
CMP reg16, imm16	81 /7 ii ii	10000001 11111mmm iiiiiiii iiiiiiii	4	1
CMP reg16, simm8	83 /7 ii	10000011 11111mmm iiiiiiii	3	1
CMP reg8, mem8	3A /r	00111010 oorrrmmm	2+	2
CMP reg16, mem16	3B /r	00111011 oorrrmmm	2+	2
CMP reg8, reg8	38 /r	001110.0 11rrrmmm	2	1
CMP reg16, reg16	39 /r	001110.1 11rrrmmm	2	1

---

CMPSB/CMPSW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CMPSB	A6	10100110	1	6
CMPSW	A7	10100111	1	6

---

CS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CS	2E	00101110	1	1

---

CWD

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
CWD	99	10011001	1	1

---

DAA

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
DAA	27	00100111	1	10

---

DAS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
DAS	2F	00101111	1	10

---

DEC

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
DEC mem8	FE /1	11111110 oo001mmm	2+	3
DEC mem16	FF /1	11111111 oo001mmm	2+	3
DEC reg8	FE /1	11111110 11001mmm	2+	1
DEC reg16	4x	01001rrr	1	1

---

DIV

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
DIV mem8	F6 /6	11110110 oo110mmm	2+	16
DIV mem16	F7 /6	11111111 oo110mmm	2+	24
DIV reg8	F6 /6	11111110 11110mmm	2	15
DIV reg16	F7 /6	11111111 11110mmm	2	23

---

DS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
DS	3E	00111110	1	1

---

ENTER

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
ENTER imm16, imm8	C8 ii ii jj	11001000 iiiiiiii iiiiiiii jjjjjjjj	3	8 (imm8 = 0) 14 (imm8 = 1) 15 + imm8 * 4 (imm8 >= 2)

---

ES

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
ES	26	00100110	1	1

---

HLT

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
HLT	F4	11110100	1	9

---

IDIV

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
IDIV mem8	F6 /7	11110110 oo111mmm	2+	18
IDIV mem16	F7 /7	11111111 oo111mmm	2+	25
IDIV reg8	F6 /7	11111110 11111mmm	2	17
IDIV reg16	F7 /7	11111111 11111mmm	2	24

---

IMUL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
IMUL mem8	F6 /5	11110110 oo101mmm	2+	4
IMUL mem16	F7 /5	11111111 oo101mmm	2+	4
IMUL reg8	F6 /5	11111110 11101mmm	2	3
IMUL reg16	F7 /5	11111111 11101mmm	2	3
IMUL reg16, mem16, imm16	69 /r ii ii	11111111 oorrrmmm iiiiiiii iiiiiiii	4	4
IMUL reg16, mem16, simm8	6B /r ii	11111111 oorrrmmm iiiiiiii	3	4
IMUL reg16, reg16, imm16	69 /r ii ii	11111111 11rrrmmm iiiiiiii iiiiiiii	4	3
IMUL reg16, reg16, simm8	6B /r ii	11111111 11rrrmmm iiiiiiii	3	3

---

IN

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
IN AL, DX	EC	11101100	1	6
IN AX, DX	ED	11101101	1	6
IN AL, imm8	E4 ii	11100100 iiiiiiii	2	6
IN AX, imm8	E5 ii	11100101 iiiiiiii	2	6

---

INC

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
INC mem8	FE /0	11111110 oo000mmm	2+	3
INC mem16	FF /0	11111111 oo000mmm	2+	3
INC reg8	FE /0	11111110 11000mmm	2+	1
INC reg16	4x	01000rrr	1	1

---

INSB/INSW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
INSB	6C	01101100	1	6
INSW	6D	01101101	1	6

---

INT

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
INT 3	CC	11001100	1	9
INT imm8	CD ii	11001101 iiiiiiii	2	10

---

INTO

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
INTO	CE	11001110	1	6 (13 if OF = 1)

---

IRET

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
IRET	CF	11001111	1	10

---

JA

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JA rel8	77 ii	01110111 iiiiiiii	2	1 (4 if branch taken)

---

JBE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JA rel8	76 ii	01110110 iiiiiiii	2	1 (4 if branch taken)

---

JC/JB

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JC rel8	72 ii	01110010 iiiiiiii	2	1 (4 if branch taken)

---

JCXZ

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JCXZ rel8	E3 ii	11100011 iiiiiiii	2	1 (4 if branch taken)

---

JG

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JG rel8	7F ii	01111111 iiiiiiii	2	1 (4 if branch taken)

---

JGE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JGE rel8	7D ii	01111101 iiiiiiii	2	1 (4 if branch taken)

---

JL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JL rel8	7C ii	01111100 iiiiiiii	2	1 (4 if branch taken)

---

JLE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JLE rel8	7E ii	01111110 iiiiiiii	2	1 (4 if branch taken)

---

JMP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JMP ptr16:16	EA oo oo ss ss	11101010 oooooooo oooooooo ssssssss ssssssss	5	7
JMP mem16	FF /4	11111111 oo100mmm	2+	5
JMP mem16:16	FF /5	11111111 oo101mmm	2+	10
JMP reg16	FF /4	11111111 11100mmm	2	4
JMP rel8	EB ii	11101011 iiiiiiii	2	4
JMP rel16	E9 ii ii	11101001 iiiiiiii iiiiiiii	3	4

---

JNC/JAE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JNC rel8	73 ii	01110011 iiiiiiii	2	1 (4 if branch taken)

---

JNO

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JNO rel8	71 ii	01110001 iiiiiiii	2	1 (4 if branch taken)

---

JNP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JNP rel8	7B ii	01111011 iiiiiiii	2	1 (4 if branch taken)

---

JNS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JNS rel8	79 ii	01111001 iiiiiiii	2	1 (4 if branch taken)

---

JNZ/JNE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JNZ rel8	75 ii	01110101 iiiiiiii	2	1 (4 if branch taken)

---

JO

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JO rel8	70 ii	01110000 iiiiiiii	2	1 (4 if branch taken)

---

JP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JP rel8	7A ii	01111010 iiiiiiii	2	1 (4 if branch taken)

---

JS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JS rel8	78 ii	01111000 iiiiiiii	2	1 (4 if branch taken)

---

JZ/JE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
JZ rel8	74 ii	01110100 iiiiiiii	2	1 (4 if branch taken)

---

LAHF

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LAHF	9F	10011111	1	2

---

LDS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LDS reg16, mem16	C5 /r	11000101 oorrrmmm	2+	6

---

LEA

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LEA reg16, mem16	8D /r	10001101 oorrrmmm	2+	1

---

LEAVE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LEAVE	C9	11001001	1	2

---

LES

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LES reg16, mem16	C4 /r	11000100 oorrrmmm	2+	6

---

LOCK

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LOCK	F0	11110000	1	1

---

LODSB/LODSW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LODSB	AC	10101100	1	3
LODSW	AD	10101101	1	3

---

LOOP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LOOP rel8	E2 ii	11100010 iiiiiiii	2	2 (5 if branch taken)

---

LOOPE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LOOPE rel8	E1 ii	11100001 iiiiiiii	2	3 (6 if branch taken)

---

LOOPNE

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
LOOPNE rel8	E0 ii	11100000 iiiiiiii	2	3 (6 if branch taken)

---

MOV

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
MOV AL, ptr16	A0 ii ii	10100000 iiiiiiii iiiiiiii	3	1
MOV AX, ptr16	A1 ii ii	10100001 iiiiiiii iiiiiiii	3	1
MOV mem8, imm8	C6 /0 ii	11000110 oo000mmm iiiiiiii	3+	1
MOV mem16, imm16	C7 /0 ii ii	11000111 oo000mmm iiiiiiii iiiiiiii	4+	1
MOV mem8, reg8	84 /r	10001000 oorrrmmm	2+	1
MOV mem16, reg16	85 /r	10001001 oorrrmmm	2+	1
MOV mem16, sreg16	8C /r	10001100 oo0rrmmm	2+	3
MOV ptr16, AL	A2 ii ii	10100010 iiiiiiii iiiiiiii	3	1
MOV ptr16, AX	A3 ii ii	10100011 iiiiiiii iiiiiiii	3	1
MOV reg8, imm8	Bx ii	10110rrr iiiiiiii	2	1
MOV reg8, imm8	C6 /0 ii	11000110 11000mmm iiiiiiii	3	1
MOV reg16, imm16	Bx ii	10111rrr iiiiiiii iiiiiiii	3	1
MOV reg16, imm16	C7 /0 ii ii	11000111 11000mmm iiiiiiii iiiiiiii	4	1
MOV reg8, mem8	8A /r	10001010 oorrrmmm	2+	1
MOV reg16, mem16	8B /r	10001011 oorrrmmm	2+	1
MOV reg8, reg8	88 /r	100010.0 11rrrmmm	2	1
MOV reg16, reg16	89 /r	100010.1 11rrrmmm	2	1
MOV reg16, sreg16	8C /r	10001100 110rrmmm	2	1
MOV sreg16, mem16	8E /r	10001110 oo0rrmmm	2	3
MOV sreg16, reg16	8E /r	10001110 110rrmmm	2+	2

---

MOVSB/MOVSW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
MOVSB	A4	10100100	1	5
MOVSW	A5	10100101	1	5

---

MUL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
MUL mem8	F6 /4	11110110 oo100mmm	2+	4
MUL mem16	F7 /4	11111111 oo100mmm	2+	4
MUL reg8	F6 /4	11111110 11100mmm	2	3
MUL reg16	F7 /4	11111111 11100mmm	2	3

---

NEG

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
NEG mem8	F6 /3	11110110 oo011mmm	2+	3
NEG mem16	F7 /3	11111111 oo011mmm	2+	3
NEG reg8	F6 /3	11111110 11011mmm	2	1
NEG reg16	F7 /3	11111111 11011mmm	2	1

---

NOP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
NOP	90	10010000	1	1

---

NOT

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
NOT mem8	F6 /2	11110110 oo010mmm	2+	3
NOT mem16	F7 /2	11111111 oo010mmm	2+	3
NOT reg8	F6 /2	11111110 11010mmm	2	1
NOT reg16	F7 /2	11111111 11010mmm	2	1

---

OR

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
OR AL, imm	0C ii	00001100 iiiiiiii	2	1
OR AX, imm	0D ii ii	00001101 iiiiiiii iiiiiiii	3	1
OR mem8, imm8	80 /6 ii	10000000 oo001mmm iiiiiiii	3+	3
OR mem16, imm16	81 /6 ii ii	10000001 oo001mmm iiiiiiii iiiiiiii	4+	3
OR mem16, simm8	83 /6 ii	10000011 oo001mmm iiiiiiii	3+	3
OR mem8, reg8	08 /r	00001000 oorrrmmm	2+	3
OR mem16, reg16	09 /r	00001001 oorrrmmm	2+	3
OR reg8, imm8	80 /6 ii	10000000 11001mmm iiiiiiii	3	1
OR reg16, imm16	81 /6 ii ii	10000001 11001mmm iiiiiiii iiiiiiii	4	1
OR reg16, simm8	83 /6 ii	10000011 11001mmm iiiiiiii	3	1
OR reg8, mem8	0A /r	00001010 oorrrmmm	2+	2
OR reg16, mem16	0B /r	00001011 oorrrmmm	2+	2
OR reg8, reg8	08 /r	000010.0 11rrrmmm	2	1
OR reg16, reg16	09 /r	000010.1 11rrrmmm	2	1

---

OUT

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
OUT AL, DX	EE	11101110	1	6
OUT AX, DX	EF	11101111	1	6
OUT AL, imm8	E6 ii	11100110 iiiiiiii	2	6
OUT AX, imm8	E7 ii	11100111 iiiiiiii	2	6

---

OUTSB/OUTSW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
OUTSB	6E	01101110	1	6
OUTSW	6F	01101111	1	6

---

POLL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
POLL	6E	01101110	1	9

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POP

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
POP mem16	8F /0	10001111 oo000mmm	2+	3
POP reg16	5x	01011xxx	1	1
POP reg16	8F /0	10001111 11000mmm	2	1
POP sreg16	xx	000xx111	1	3

---

POPA

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
POPA	61	01100001	1	8

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POPF

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
POPF	9D	10011101	1	3

---

PUSH

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
PUSH imm8	6A ii	01101010 iiiiiiii	2	1
PUSH imm16	68 ii ii	01101000 iiiiiiii iiiiiiii	3	1
PUSH mem16	FF /6	11111111 oo110mmm	2+	2
PUSH reg16	5x	01010xxx	1	1
PUSH reg16	FF /6	11111111 11110mmm	2	1
PUSH sreg16	xx	000xx110	1	2

---

PUSHA

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
PUSHA	60	01100000	1	9

---

PUSHF

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
PUSHF	9C	10011100	1	2

---

RCL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
RCL mem8, 1	D0 /2	11010000 oo010rm	2+	3
RCL mem8, CL	D2 /2	11010010 oo010rm	2+	5
RCL mem8, imm8	C0 /2 ii	11000000 oo010mmm iiiiiiii	3+	5
RCL mem16, 1	D1 /2	11010001 oo010rm	2+	3
RCL mem16, CL	D3 /2	11010011 oo010rm	2+	5
RCL mem16, imm8	C1 /2 ii	11000001 oo010mmm iiiiiiii	3+	5
RCL reg8, 1	D0 /2	11010000 11010rm	2	1
RCL reg8, CL	D2 /2	11010010 11010rm	2	3
RCL reg8, imm8	C0 /2 ii	11000000 11010mmm iiiiiiii	3	3
RCL reg16, 1	D1 /2	11010001 11010rm	2	1
RCL reg16, CL	D3 /2	11010011 11010rm	2	3
RCL reg16, imm8	C1 /2 ii	11000001 11010mmm iiiiiiii	3	3

---

RCR

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
RCR mem8, 1	D0 /3	11010000 oo011rm	2+	3
RCR mem8, CL	D2 /3	11010010 oo011rm	2+	5
RCR mem8, imm8	C0 /3 ii	11000000 oo011mmm iiiiiiii	3+	5
RCR mem16, 1	D1 /3	11010001 oo011rm	2+	3
RCR mem16, CL	D3 /3	11010011 oo011rm	2+	5
RCR mem16, imm8	C1 /3 ii	11000001 oo011mmm iiiiiiii	3+	5
RCR reg8, 1	D0 /3	11010000 11011rm	2	1
RCR reg8, CL	D2 /3	11010010 11011rm	2	3
RCR reg8, imm8	C0 /3 ii	11000000 11011mmm iiiiiiii	3	3
RCR reg16, 1	D1 /3	11010001 11011rm	2	1
RCR reg16, CL	D3 /3	11010011 11011rm	2	3
RCR reg16, imm8	C1 /3 ii	11000001 11011mmm iiiiiiii	3	3

---

---

---

RET

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
RET	C3	11000011	1	6
RET imm16	C2 ii ii	11000010 iiiiiiii iiiiiiii	1	6

---

RETF

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
RETF	CB	11001011	1	8
RETF imm16	CA ii ii	11001010 iiiiiiii iiiiiiii	1	9

---

ROL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
ROL mem8, 1	D0 /0	11010000 oo000rm	2+	3
ROL mem8, CL	D2 /0	11010010 oo000rm	2+	5
ROL mem8, imm8	C0 /0 ii	11000000 oo000mmm iiiiiiii	3+	5
ROL mem16, 1	D1 /0	11010001 oo000rm	2+	3
ROL mem16, CL	D3 /0	11010011 oo000rm	2+	5
ROL mem16, imm8	C1 /0 ii	11000001 oo000mmm iiiiiiii	3+	5
ROL reg8, 1	D0 /0	11010000 11000rm	2	1
ROL reg8, CL	D2 /0	11010010 11000rm	2	3
ROL reg8, imm8	C0 /0 ii	11000000 11000mmm iiiiiiii	3	3
ROL reg16, 1	D1 /0	11010001 11000rm	2	1
ROL reg16, CL	D3 /0	11010011 11000rm	2	3
ROL reg16, imm8	C1 /0 ii	11000001 11000mmm iiiiiiii	3	3

---

ROR

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
ROR mem8, 1	D0 /1	11010000 oo001rm	2+	3
ROR mem8, CL	D2 /1	11010010 oo001rm	2+	5
ROR mem8, imm8	C0 /1 ii	11000000 oo001mmm iiiiiiii	3+	5
ROR mem16, 1	D1 /1	11010001 oo001rm	2+	3
ROR mem16, CL	D3 /1	11010011 oo001rm	2+	5
ROR mem16, imm8	C1 /1 ii	11000001 oo001mmm iiiiiiii	3+	5
ROR reg8, 1	D0 /1	11010000 11001rm	2	1
ROR reg8, CL	D2 /1	11010010 11001rm	2	3
ROR reg8, imm8	C0 /1 ii	11000000 11001mmm iiiiiiii	3	3
ROR reg16, 1	D1 /1	11010001 11001rm	2	1
ROR reg16, CL	D3 /1	11010011 11001rm	2	3
ROR reg16, imm8	C1 /1 ii	11000001 11001mmm iiiiiiii	3	3

---

SAHF

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SAHF	9E	10011110	1	4

---

SAR

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SAR mem8, 1	D0 /7	11010000 oo111rm	2+	3
SAR mem8, CL	D2 /7	11010010 oo111rm	2+	5
SAR mem8, imm8	C0 /7 ii	11000000 oo111mmm iiiiiiii	3+	5
SAR mem16, 1	D1 /7	11010001 oo111rm	2+	3
SAR mem16, CL	D3 /7	11010011 oo111rm	2+	5
SAR mem16, imm8	C1 /7 ii	11000001 oo111mmm iiiiiiii	3+	5
SAR reg8, 1	D0 /7	11010000 11111rm	2	1
SAR reg8, CL	D2 /7	11010010 11111rm	2	3
SAR reg8, imm8	C0 /7 ii	11000000 11111mmm iiiiiiii	3	3
SAR reg16, 1	D1 /7	11010001 11111rm	2	1
SAR reg16, CL	D3 /7	11010011 11111rm	2	3
SAR reg16, imm8	C1 /7 ii	11000001 11111mmm iiiiiiii	3	3

---

SBB

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SBB AL, imm	1C ii	00011100 iiiiiiii	2	1
SBB AX, imm	1D ii ii	00011101 iiiiiiii iiiiiiii	3	1
SBB mem8, imm8	80 /3 ii	10000000 oo011mmm iiiiiiii	3+	3
SBB mem16, imm16	81 /3 ii ii	10000001 oo011mmm iiiiiiii iiiiiiii	4+	3
SBB mem16, simm8	83 /3 ii	10000011 oo011mmm iiiiiiii	3+	3
SBB mem8, reg8	18 /r	00011000 oorrrmmm	2+	3
SBB mem16, reg16	19 /r	00011001 oorrrmmm	2+	3
SBB reg8, imm8	80 /3 ii	10000000 11011mmm iiiiiiii	3	1
SBB reg16, imm16	81 /3 ii ii	10000001 11011mmm iiiiiiii iiiiiiii	4	1
SBB reg16, simm8	83 /3 ii	10000011 11011mmm iiiiiiii	3	1
SBB reg8, mem8	1A /r	00011010 oorrrmmm	2+	2
SBB reg16, mem16	1B /r	00011011 oorrrmmm	2+	2
SBB reg8, reg8	18 /r	000110.0 11rrrmmm	2	1
SBB reg16, reg16	19 /r	000110.1 11rrrmmm	2	1

---

SCASB/SCASW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SCASB	AE	10101110	1	4
SCASW	AF	10101111	1	4

---

SHL

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SHL mem8, 1	D0 /4	11010000 oo100rm	2+	3
SHL mem8, CL	D2 /4	11010010 oo100rm	2+	5
SHL mem8, imm8	C0 /4 ii	11000000 oo100mmm iiiiiiii	3+	5
SHL mem16, 1	D1 /4	11010001 oo100rm	2+	3
SHL mem16, CL	D3 /4	11010011 oo100rm	2+	5
SHL mem16, imm8	C1 /4 ii	11000001 oo100mmm iiiiiiii	3+	5
SHL reg8, 1	D0 /4	11010000 11100rm	2	1
SHL reg8, CL	D2 /4	11010010 11100rm	2	3
SHL reg8, imm8	C0 /4 ii	11000000 11100mmm iiiiiiii	3	3
SHL reg16, 1	D1 /4	11010001 11100rm	2	1
SHL reg16, CL	D3 /4	11010011 11100rm	2	3
SHL reg16, imm8	C1 /4 ii	11000001 11100mmm iiiiiiii	3	3

---

SHR

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SHR mem8, 1	D0 /5	11010000 oo101rm	2+	3
SHR mem8, CL	D2 /5	11010010 oo101rm	2+	5
SHR mem8, imm8	C0 /5 ii	11000000 oo101mmm iiiiiiii	3+	5
SHR mem16, 1	D1 /5	11010001 oo101rm	2+	3
SHR mem16, CL	D3 /5	11010011 oo101rm	2+	5
SHR mem16, imm8	C1 /5 ii	11000001 oo101mmm iiiiiiii	3+	5
SHR reg8, 1	D0 /5	11010000 11101rm	2	1
SHR reg8, CL	D2 /5	11010010 11101rm	2	3
SHR reg8, imm8	C0 /5 ii	11000000 11101mmm iiiiiiii	3	3
SHR reg16, 1	D1 /5	11010001 11101rm	2	1
SHR reg16, CL	D3 /5	11010011 11101rm	2	3
SHR reg16, imm8	C1 /5 ii	11000001 11101mmm iiiiiiii	3	3

---

SS

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SS	36	00110110	1	1

---

STC

Flag	New value
CF - Carry	1

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
STC	F9	11111001	1	4

---

STD

Flag	New value
DF - Direction	1

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
STD	FD	11111101	1	4

---

STI

Flag	New value
IF - Interrupt	1

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
STI	FB	11111011	1	4

---

STOSB/STOSW

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
STOSB	AA	10101010	1	3
STOSW	AB	10101011	1	3

---

SUB

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
SUB AL, imm	28 ii	00101100 iiiiiiii	2	1
SUB AX, imm	29 ii ii	00101101 iiiiiiii iiiiiiii	3	1
SUB mem8, imm8	80 /5 ii	10000000 oo101mmm iiiiiiii	3+	3
SUB mem16, imm16	81 /5 ii ii	10000001 oo101mmm iiiiiiii iiiiiiii	4+	3
SUB mem16, simm8	83 /5 ii	10000011 oo101mmm iiiiiiii	3+	3
SUB mem8, reg8	28 /r	00101000 oorrrmmm	2+	3
SUB mem16, reg16	29 /r	00101001 oorrrmmm	2+	3
SUB reg8, imm8	80 /5 ii	10000000 11101mmm iiiiiiii	3	1
SUB reg16, imm16	81 /5 ii ii	10000001 11101mmm iiiiiiii iiiiiiii	4	1
SUB reg16, simm8	83 /5 ii	10000011 11101mmm iiiiiiii	3	1
SUB reg8, mem8	2A /r	00101010 oorrrmmm	2+	2
SUB reg16, mem16	2B /r	00101011 oorrrmmm	2+	2
SUB reg8, reg8	28 /r	001010.0 11rrrmmm	2	1
SUB reg16, reg16	29 /r	001010.1 11rrrmmm	2	1

---

TEST

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
TEST AL, imm	A8 ii	10101000 iiiiiiii	2	1
TEST AX, imm	A9 ii ii	10101001 iiiiiiii iiiiiiii	3	1
TEST mem8, imm8	F6 /0 ii	11110110 oo000mmm iiiiiiii	3+	2
TEST mem16, imm16	F7 /0 ii ii	11110111 oo000mmm iiiiiiii iiiiiiii	4+	2
TEST mem8, reg8 TEST reg8, mem8	84 /r	10000100 oorrrmmm	2+	2
TEST mem16, reg16 TEST reg16, mem16	85 /r	10000101 oorrrmmm	2+	2
TEST reg8, imm8	F6 /0 ii	11110110 11000mmm iiiiiiii	3	1
TEST reg16, imm16	F7 /0 ii ii	11110111 11000mmm iiiiiiii iiiiiiii	4	1
TEST reg8, reg8	84 /r	10000100 11rrrmmm	2	1
TEST reg16, reg16	85 /r	10000101 11rrrmmm	2	1

---

XCHG

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
XCHG AX, reg16 XCHG reg16, AX	9x	10010rrr	1	3
XCHG mem8, reg8 XCHG reg8, mem8	86 /r	10000110 oorrrmmm	2+	5
XCHG mem16, reg16 XCHG reg16, mem16	87 /r	10000111 oorrrmmm	2+	5
XCHG reg8, reg8	86 /r	10000110 11rrrmmm	2+	3
XCHG reg16, reg16	87 /r	10000111 11rrrmmm	2+	3

---

XLAT

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
XLAT	D7	11010111	1	5

---

XOR

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles
XOR AL, imm	34 ii	00110100 iiiiiiii	2	1
XOR AX, imm	35 ii ii	00110101 iiiiiiii iiiiiiii	3	1
XOR mem8, imm8	80 /6 ii	10000000 oo110mmm iiiiiiii	3+	3
XOR mem16, imm16	81 /6 ii ii	10000001 oo110mmm iiiiiiii iiiiiiii	4+	3
XOR mem16, simm8	83 /6 ii	10000011 oo110mmm iiiiiiii	3+	3
XOR mem8, reg8	30 /r	00110000 oorrrmmm	2+	3
XOR mem16, reg16	31 /r	00110001 oorrrmmm	2+	3
XOR reg8, imm8	80 /6 ii	10000000 11110mmm iiiiiiii	3	1
XOR reg16, imm16	81 /6 ii ii	10000001 11110mmm iiiiiiii iiiiiiii	4	1
XOR reg16, simm8	83 /6 ii	10000011 11110mmm iiiiiiii	3	1
XOR reg8, mem8	32 /r	00110010 oorrrmmm	2+	2
XOR reg16, mem16	33 /r	00110011 oorrrmmm	2+	2
XOR reg8, reg8	30 /r	001100.0 11rrrmmm	2	1
XOR reg16, reg16	31 /r	001100.1 11rrrmmm	2	1