User contributions for Asie

15 December 2024

• 09:0909:09, 15 December 2024 diff hist +99‎ WonderWitch/FreyaBIOS/System ‎ →‎INT $17/AH=$0B - sys_suspend
• 09:0809:08, 15 December 2024 diff hist +187‎ WonderWitch/FreyaBIOS/System ‎No edit summary
• 08:0208:02, 15 December 2024 diff hist +240‎ WonderWitch/FreyaBIOS/System ‎ →‎INT $17/AH=$0B - sys_suspend
• 07:5107:51, 15 December 2024 diff hist +120‎ WonderWitch/FreyaBIOS/System ‎ provide initial inormation on sys_suspend/resume

14 December 2024

• 21:2721:27, 14 December 2024 diff hist +716‎ WonderWitch/FreyaBIOS/Communication ‎ comm_xmodem: clarify basic workflows
• 10:3910:39, 14 December 2024 diff hist +330‎ WonderWitch/FreyaBIOS/Communication ‎ →‎Usage
• 10:3610:36, 14 December 2024 diff hist +1,821‎ WonderWitch/FreyaBIOS/Communication ‎ →‎INT $14/AH=$0D - comm_xmodem

13 December 2024

• 21:0521:05, 13 December 2024 diff hist +190‎ WonderWitch/Memory map ‎ →‎Internal RAM (0x00000 - 0x0FFFF)
• 20:4820:48, 13 December 2024 diff hist +45‎ WonderWitch/Memory map ‎No edit summary
• 20:4620:46, 13 December 2024 diff hist +235‎ WonderWitch/Memory map ‎ →‎Internal RAM (0x00000 - 0x0FFFF)
• 20:4520:45, 13 December 2024 diff hist +150‎ WonderWitch/Memory map ‎No edit summary
• 15:1915:19, 13 December 2024 diff hist +99‎ m WonderWitch/FreyaBIOS/Timer ‎No edit summary
• 15:1715:17, 13 December 2024 diff hist +32‎ m Real-Time Clock ‎ →‎Alarm configuration
• 15:1415:14, 13 December 2024 diff hist +1,790‎ Real-Time Clock ‎ clarify register layout

12 December 2024

• 15:2615:26, 12 December 2024 diff hist +153‎ EEPROM ‎ →‎Commands: ERAL/WRAL

11 December 2024

• 18:2118:21, 11 December 2024 diff hist 0‎ Bandai 2001 ‎ Command -> Control, disambiguate

8 December 2024

• 13:1813:18, 8 December 2024 diff hist +18‎ ROM header ‎ →‎Developer/Publisher ID ($6)
• 10:0110:01, 8 December 2024 diff hist +10‎ ROM header ‎ →‎Developer/Publisher ID ($6): add Soeishinsha
• 09:5709:57, 8 December 2024 diff hist +4‎ m WonderWitch/Flash ‎ →‎Sector layout
• 09:5709:57, 8 December 2024 diff hist +679‎ WonderWitch/Flash ‎ document sector layout
• 09:4409:44, 8 December 2024 diff hist +1,506‎ WonderWitch/FreyaBIOS/System ‎ →‎Interrupts: start

7 December 2024

• 21:4821:48, 7 December 2024 diff hist +258‎ Display ‎ →‎LCD Control ($14): briefly document high contrast

1 December 2024

• 20:3220:32, 1 December 2024 diff hist +11‎ ROM header ‎ →‎Developer/Publisher ID ($6): add Hearty Robin

24 November 2024

• 17:4817:48, 24 November 2024 diff hist +129‎ WSdev Wiki ‎ →‎Cartridge components
• 17:4617:46, 24 November 2024 diff hist +35‎ WSdev Wiki ‎ →‎WonderWitch
• 17:4617:46, 24 November 2024 diff hist +380‎ N WonderWitch/Flash ‎ Created page with "The WonderWitch cartridge features a 512KiB flash chip - the MBM29DL400TC. While the WonderSwan SoC pervents writes to the ROM area, it can be written to via the SRAM area using port $CE on the Bandai 2003 mapper. TODO: Document commands. == Links == * [https://github.com/up-n-atom/WonderWitch/blob/main/Datasheets/MBM29DL400BC-12PFTN_to_MBM29DL400TC-90PFTN.pdf Datasheet]"
• 17:4417:44, 24 November 2024 diff hist +149‎ m Bandai 2003 ‎ clarify terminology
• 17:4017:40, 24 November 2024 diff hist +152‎ m Mapper ‎ clarify terminology current

20 October 2024

• 16:3916:39, 20 October 2024 diff hist +549‎ N WonderWitch/FreyaBIOS/System ‎ Created page with "The System interrupt provides assorted system-related functionality. == Types == === Suspend/resume structure === This structure is stored in SRAM block 3, offset <code>$7E00</code> (core 1) and <code>$BF00</code> (core 0). {| class="wikitable" |- ! Offset !! Size !! Contents |- | $0000 || 16384 || Copy of RAM area <code>$0000</code> - <code>$3FFF</code> |- | $4000 || 2 || Stack segment? |- | $4002 || 2 || Data segment? |- | $4004 || 224 || Copy of IO ports <code>$00..."
• 13:1313:13, 20 October 2024 diff hist +48‎ WonderWitch/FreyaBIOS/Bank ‎ →‎INT $18/AH=$07 - bank_write_block current
• 10:3910:39, 20 October 2024 diff hist +48‎ WonderWitch/FreyaBIOS/Bank ‎ →‎INT $18/AH=$09 - bank_erase_flash
• 10:2910:29, 20 October 2024 diff hist 0‎ WonderWitch/FreyaBIOS/Bank ‎No edit summary
• 08:2308:23, 20 October 2024 diff hist +144‎ WonderWitch/FreyaBIOS/Text ‎No edit summary

19 October 2024

• 20:4620:46, 19 October 2024 diff hist 0‎ m WonderWitch/FreyaBIOS ‎ →‎Revisions current
• 20:4620:46, 19 October 2024 diff hist +13‎ WonderWitch/FreyaBIOS ‎ →‎Revisions
• 20:4620:46, 19 October 2024 diff hist +972‎ WonderWitch/Memory map ‎No edit summary
• 20:4320:43, 19 October 2024 diff hist −1,274‎ WonderWitch ‎ →‎Memory map current
• 19:2019:20, 19 October 2024 diff hist +228‎ WonderWitch/Memory map ‎No edit summary
• 19:1319:13, 19 October 2024 diff hist −17‎ m WonderWitch/Memory map ‎No edit summary
• 19:1319:13, 19 October 2024 diff hist +1,999‎ N WonderWitch/Memory map ‎ Created page with "== Memory map == {| class="wikitable" |+ WonderWitch memory map ! Address ! ASCII, 1 screen ! ASCII, 2 screens ! Shift-JIS, 1 screen ! Shift-JIS, 2 screens |- | style="text-align: center;" | 0x0000 | colspan="4" style="text-align: center;" | Interrupt vectors |- | style="text-align: center;" | 0x0100 | colspan="4" style="text-align: center;" | ? |- | style="text-align: center;" | 0x0E00 | rowspan="7" style="text-align: center;" | | rowspan="5" style="text-align: center;..."
• 19:0119:01, 19 October 2024 diff hist +41‎ WSdev Wiki ‎ →‎WonderWitch
• 17:1217:12, 19 October 2024 diff hist +117‎ WonderWitch/IL ‎No edit summary current
• 12:5112:51, 19 October 2024 diff hist +591‎ N WonderWitch/IL/IlibIL ‎ Created page with "IlibIL is a library used to load other indirect libraries present on the system. == Functions == === open === <code>int open(const char far *name, IL far *buffer);</code> Load the specified IL <code>name</code> from <code>/rom0</code> or <code>/kern</code>. The IL header is copied to the provided <code>buffer</code> with addresses appropriately relocated to match the IL's location in ROM. === open_system === <code>int open_system(const char far *name, IL far *buffe..." current
• 12:0512:05, 19 October 2024 diff hist +108‎ m WonderWitch/FreyaOS ‎ →‎Revisions current
• 12:0512:05, 19 October 2024 diff hist +252‎ WonderWitch/FreyaOS ‎ add FreyaOS 1.1.2 and 1.1.3 changelog information
• 12:0112:01, 19 October 2024 diff hist +456‎ N WonderWitch/IL/ResumeIL ‎ Created page with "== ResumeIL == ResumeIL is a library which augments the process suspend/resume functionality of the built-in ProcIL library to also archive the memory areas <code>0x4000 - 0xBFFF</code> (WSC expanded/4bpp tile memory) and <code>0xFE00 - 0xFFFF</code> (WSC palette memory). This is done by copying this memory to <code>/ram0/resume.dat</code>. === Limitations === - This approach only allows suspending and resuming one process." current
• 11:1911:19, 19 October 2024 diff hist +1,837‎ N WonderWitch/FreyaBIOS/Timer ‎ Created page with "The Timer interrupt provides an abstraction layer for the WonderSwan's timers, as well as the on-cartridge RTC. == Types == === RTC fields === The RTC field indexes match the order of fields returned by the RTC chip. Note that FreyaBIOS transparently converts the values to and from BCD. {| class="wikitable" |- ! Index !! Data !! Format |- | 0 || Year || 0 - 99; 0 is assumed to be the year 2000. |- | 1 || Month || 1 - 12 |- | 2 || Date..."
• 07:5107:51, 19 October 2024 diff hist +27‎ WonderWitch/Process ‎ →‎Launching procedure current

18 October 2024

• 18:1118:11, 18 October 2024 diff hist +5‎ WonderWitch/Process ‎ →‎Compiler IDs
• 18:0218:02, 18 October 2024 diff hist +2,499‎ N WonderWitch/Process ‎ Created page with "== Memory layout == Process memory is stored in SRAM banks 3 (process 0 - typically used by FreyaOS), 2 (process 1) and 1 (process 2). The entire bank is available to the process. === Process control block === The process control block contains information about the running process. It is stored in the first 96 bytes of data. {| class="wikitable" |+ Process control block structure |- ! Offset !! Length !! Contents |- | 0 || 4 || Compiler ID, zero-terminated string; s..."