User contributions for Asie

22 August 2023

• 18:1718:17, 22 August 2023 diff hist +28‎ Frame timing ‎No edit summary
• 18:1518:15, 22 August 2023 diff hist +9,084‎ N Frame timing ‎ Created page with "Notes: * Sprite indices are given negatively. Sprites are filtered for every line, and are drawn from last found to first found. * Fetches may be off by one cycle. This stuff is complicated. {| class="wikitable" ! rowspan="2" | Cycle ! rowspan="2" | CPU ! colspan="4" | PPU ! rowspan="2" | APU ! rowspan="2" | Palette |- ! Mono/2BPP ! Color/2BPP ! Color/4BPP ! Line 144 |- | 0 | rowspan="117" style="vertical-align:top;" | V30MZ ! rowspan="256" style="text-align: center;"..."
• 16:4416:44, 22 August 2023 diff hist 0‎ I/O port map ‎No edit summary
• 16:4316:43, 22 August 2023 diff hist +297‎ I/O port map ‎No edit summary
• 16:4116:41, 22 August 2023 diff hist +3,400‎ N EEPROM ‎ Created page with "The WonderSwan utilizes M93LCx6-compatible EEPROMs: * in the SoC: ** 1 Kbit internal EEPROM (M93LC46-compatible) on the WonderSwan, ** 16 Kbit internal EEPROM (M93LC86-compatible) on the WonderSwan Color, * on cartridges: ** 1 Kbit cartridge EEPROM (M93LC46-compatible) ** 8 Kbit cartridge EEPROM (M93LC76-compatible) ** 16 Kbit cartridge EEPROM (M93LC86-compatible) Additional variants exists which were not seen on any production cartridge: * 2 Kbit EEPROM (M93LC56-comp..."
• 14:1214:12, 22 August 2023 diff hist +591‎ Splash animation ‎No edit summary
• 14:0914:09, 22 August 2023 diff hist +2,086‎ N Splash animation ‎ Created page with "The WonderSwan Color upgraded the internal EEPROM from 128 bytes to 2 kilobytes; most of the additional space is utilized to allow for branding consoles in the form of unique, custom splash animations on console startup. == Format == {| class="wikitable" |- ! Offset !! Length !! Contents |- | $83 || 1 || WSC-specific configuration. Bit 7 enables custom splash animation. |- | $84 || 1 || Name color |- | $85 || 1 || Must be $00 |- | $86 || 1 || Size; 0 = ends..."
• 13:5213:52, 22 August 2023 diff hist +78‎ WSdev Wiki ‎No edit summary
• 12:4712:47, 22 August 2023 diff hist 0‎ I/O port map ‎No edit summary
• 12:4612:46, 22 August 2023 diff hist +143‎ I/O port map ‎No edit summary
• 12:4212:42, 22 August 2023 diff hist +97‎ Timing ‎No edit summary
• 12:4212:42, 22 August 2023 diff hist +195‎ KARNAK ‎No edit summary
• 12:4112:41, 22 August 2023 diff hist 0‎ m KARNAK ‎No edit summary
• 12:4112:41, 22 August 2023 diff hist +10‎ KARNAK ‎No edit summary
• 12:4012:40, 22 August 2023 diff hist +52‎ WSdev Wiki ‎No edit summary
• 12:3812:38, 22 August 2023 diff hist +8‎ DMA ‎No edit summary
• 12:3812:38, 22 August 2023 diff hist +18‎ DMA ‎No edit summary
• 12:3612:36, 22 August 2023 diff hist +49‎ DMA ‎No edit summary
• 12:3512:35, 22 August 2023 diff hist +3,202‎ N DMA ‎ Created page with "The WonderSwan Color introduced two DMA blocks: * General DMA (GDMA) - allowing for fast IRAM/ROM -> IRAM transfers, * Sound DMA (SDMA) - allowing for IRAM/ROM -> sound transfers in a much less CPU-intensive way than an interrupt. == General DMA == {{Anchor|GDMA Source Address Low}} {{Anchor|GDMA Source Address High}} === GDMA Source Address ($40, $41, $42) === <pre> 23 bit 16 15 bit 8 7 bit 0 ---- ---- ---- ---- ---- ---- .... hhhh llll llll llll llll..."
• 12:2312:23, 22 August 2023 diff hist 0‎ Hyper Voice ‎No edit summary
• 12:2312:23, 22 August 2023 diff hist +31‎ WSdev Wiki ‎No edit summary
• 12:2112:21, 22 August 2023 diff hist +97‎ Hyper Voice ‎No edit summary
• 12:2012:20, 22 August 2023 diff hist +2,105‎ N Hyper Voice ‎ Created page with "Hyper Voice is a headphone-only sample output channel introduced with the WonderSwan Color. It allows converting 8-bit signed and unsigned, mono and stereo samples into 16-bit signed PCM sent directly to the headphone output, after mixing with the traditional four channels. == I/O Ports == === Hyper Voice Left Output ($64, $65) === === Hyper Voice Right Output ($66, $67) === <pre> 15 bit 8 7 bit 0 ---- ---- ---- ---- ssss ssss ssss ssss ++++-++++--++++-++++..."
• 12:1112:11, 22 August 2023 diff hist +642‎ Sound ‎No edit summary
• 12:0812:08, 22 August 2023 diff hist +23‎ m Sound ‎No edit summary
• 12:0312:03, 22 August 2023 diff hist −1‎ ROM header ‎ adjust port category name formatting
• 12:0012:00, 22 August 2023 diff hist +498‎ Display ‎ adjust port category name formatting
• 11:5611:56, 22 August 2023 diff hist 0‎ Sound ‎No edit summary
• 11:5511:55, 22 August 2023 diff hist +534‎ Sound ‎ adjust port category name formatting
• 11:5211:52, 22 August 2023 diff hist +28‎ Keypad ‎No edit summary
• 11:5111:51, 22 August 2023 diff hist +200‎ Timers ‎ adjust port category name formatting current
• 11:4811:48, 22 August 2023 diff hist +149‎ Interrupts ‎ adjust port category name formatting
• 10:1010:10, 22 August 2023 diff hist +180‎ Sound ‎No edit summary
• 10:0910:09, 22 August 2023 diff hist +1,426‎ Sound ‎No edit summary
• 10:0110:01, 22 August 2023 diff hist −4‎ Sound ‎No edit summary
• 10:0010:00, 22 August 2023 diff hist +5,772‎ N Sound ‎ Created page with "The WonderSwan features the following sound hardware: * Four audio channels: ** channel 1 - wavetable (32 x 4-bit samples), ** channel 2 - wavetable or 8-bit unsigned PCM sample, ** channel 3 - wavetable with optional hardware sweep, ** channel 4 - wavetable or LFSR noise, * Hyper Voice^(color) - headphone output exclusive 16-bit stereo PCM output, * 24000 Hz output: ** internal speaker - 8-bit, mono, ** headphone output - 16-bit, stereo. The sound is mix..."
• 09:5809:58, 22 August 2023 diff hist +1‎ I/O port map ‎No edit summary
• 09:5809:58, 22 August 2023 diff hist +594‎ I/O port map ‎No edit summary
• 09:1509:15, 22 August 2023 diff hist +2,096‎ Display ‎No edit summary
• 09:1309:13, 22 August 2023 diff hist −1‎ I/O port map ‎No edit summary
• 08:2908:29, 22 August 2023 diff hist +174‎ WonderGate/bplXX.mopera.ne.jp ‎No edit summary current
• 08:2508:25, 22 August 2023 diff hist +2,011‎ Display ‎No edit summary
• 08:1608:16, 22 August 2023 diff hist +5,990‎ N Display ‎ initial page
• 06:4806:48, 22 August 2023 diff hist +10‎ Memory map ‎No edit summary
• 06:4706:47, 22 August 2023 diff hist +239‎ Memory map ‎No edit summary
• 06:4606:46, 22 August 2023 diff hist 0‎ m Memory map ‎No edit summary
• 06:4606:46, 22 August 2023 diff hist +12‎ m Memory map ‎No edit summary
• 06:4606:46, 22 August 2023 diff hist +40‎ Memory map ‎No edit summary
• 06:4506:45, 22 August 2023 diff hist +22‎ WSdev Wiki ‎ split console and cartridge components
• 06:4406:44, 22 August 2023 diff hist +3,313‎ N Memory map ‎ Created page with "The WonderSwan's SoC enforces the following memory map layout: {| class="wikitable" |+ WonderSwan SoC linear memory map ! Bus ! colspan="2" | Address range ! Access width ! Access speed ! Read/Write |- | Internal | colspan="2" style="text-align: center;" | 0x00000<br/>0x0FFFF | 16-bit | 1 cycle | RW |- | rowspan="2" | Cartridge | rowspan="2" style="text-align: center;" | 0x10000<br/>0xFFFFF | style="text-align: center;" | 0x10000<br/>0x1FFFF | 8-bit | ??? | RW |- | styl..."