I/O port map

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The WonderSwan SoC has three general blocks of I/O port accesses:

From To Holder Width Speed
$00 $B7 WonderSwan SoC 16-bit 1 cycle
$B8 $BF Internal EEPROM control 16-bit 1 cycle
$C0 $FF Cartridge bus 8-bit 1(color)/2 cycles (configurable)

With the exception of internal EEPROM on the ASWAN, all unaligned 16-bit accesses can be converted to two 8-bit accesses with a 1-cycle penalty.

I/O port map

  • Superscripts are used to mark ports specific to a given mode or platform:
    • Color mode: (color). Such ports are only accessible when color mode is enabled through port $60.
    • WS/WSC/SC console: (WS), (WSC), (SC).
  • If two Bits rows are provided, the second one refers to the "Color" mode.
  • The Type can be: R - readable, W - writable, L - writable before boot ROM lockout, 8/16 - width (byte/word).
Category Port Description Bits Type Notes
Display $00 Display Control ..ow Ws21 RW8
$01 Display Background .... .sss

pppp iiii

RW8 Shade (s)

Palette (p), Index (i)

$02 Display Current Line llll llll R8 Line (l)
$03 Display Interrupt Line llll llll RW8 Line (l)
$04 Sprite Table Address ...a aaaa

..aa aaaa

RW8 Address >> 9 (a)
$05 Sprite Table First .iii iiii RW8 Index (i)
$06 Sprite Table Count cccc cccc RW8 Count (c)
$07 Screen Address .222 .111

2222 1111

RW8 Screen 1 address >> 11 (1)

Screen 2 address >> 11 (2)

$08 Screen 2 Window Left xxxx xxxx RW8 Coordinate (x)
$09 Screen 2 Window Top yyyy yyyy RW8 Coordinate (y)
$0A Screen 2 Window Right xxxx xxxx RW8 Coordinate (x)
$0B Screen 2 Window Bottom yyyy yyyy RW8 Coordinate (y)
$0B Sprite Window Left xxxx xxxx RW8 Coordinate (x)
$0C Sprite Window Top yyyy yyyy RW8 Coordinate (y)
$0E Sprite Window Right xxxx xxxx RW8 Coordinate (x)
$0F Sprite Window Bottom yyyy yyyy RW8 Coordinate (y)
$10 Screen 1 Scroll X xxxx xxxx RW8 Coordinate (x)
$11 Screen 1 Scroll Y yyyy yyyy RW8 Coordinate (y)
$12 Screen 2 Scroll X xxxx xxxx RW8 Coordinate (x)
$13 Screen 2 Scroll Y yyyy yyyy RW8 Coordinate (y)
$14 LCD Control .... ..Ce RW8 Contrast (C)(WSC), Enable (e)
$15 LCD Icon Control ..32 1hvs RW8 Auxillary 3 (3), Auxillary 2 (2), Auxillary 1 (1),

Horizontal (h), Vertical (v), Sleep (s)

$16 LCD Final Line llll llll RW8 Line (l)
$17 LCD Back Porch Line(WSC) llll llll RW8 Line (l)
$1A LCD Status ...v vv.s RW8 Volume segment status (v), Sleep (s)
$1C LCD Mono Shade LUT 0/1 1111 0000 RW8 Shade index
$1D LCD Mono Shade LUT 2/3 3333 2222 RW8 Shade index
$1E LCD Mono Shade LUT 4/5 5555 4444 RW8 Shade index
$1F LCD Mono Shade LUT 6/7 7777 6666 RW8 Shade index
$20 LCD Mono Palette 0 .333 .222 .111 .000 RW16 Shade LUT index
$22 LCD Mono Palette 1 .333 .222 .111 .000 RW16 Shade LUT index
$24 LCD Mono Palette 2 .333 .222 .111 .000 RW16 Shade LUT index
$26 LCD Mono Palette 3 .333 .222 .111 .000 RW16 Shade LUT index
$28 LCD Mono Palette 4 .333 .222 .111 .000 RW16 Shade LUT index
$2A LCD Mono Palette 5 .333 .222 .111 .000 RW16 Shade LUT index
$2C LCD Mono Palette 6 .333 .222 .111 .000 RW16 Shade LUT index
$2E LCD Mono Palette 7 .333 .222 .111 .000 RW16 Shade LUT index
$30 LCD Mono Palette 8 .333 .222 .111 .000 RW16 Shade LUT index
$32 LCD Mono Palette 9 .333 .222 .111 .000 RW16 Shade LUT index
$34 LCD Mono Palette 10 .333 .222 .111 .000 RW16 Shade LUT index
$36 LCD Mono Palette 11 .333 .222 .111 .000 RW16 Shade LUT index
$38 LCD Mono Palette 12 .333 .222 .111 .000 RW16 Shade LUT index
$3A LCD Mono Palette 13 .333 .222 .111 .000 RW16 Shade LUT index
$3C LCD Mono Palette 14 .333 .222 .111 .000 RW16 Shade LUT index
$3E LCD Mono Palette 15 .333 .222 .111 .000 RW16 Shade LUT index
DMA(color) $40 GDMA Source Address Low llll llll llll lll. RW16 Linear address, low 16 bits (l)
$42 GDMA Source Address High .... hhhh RW8 Linear address, high 4 bits (h)
$44 GDMA Destination Address aaaa aaaa aaaa aaa. RW16 IRAM address (a)
$46 GDMA Length bbbb bbbb bbbb bbb. RW16 Bytes (b)
$48 GDMA Control ed.. .... RW8 Enable (e), Decrement (d)
$4A SDMA Source Address Low llll llll llll llll RW16 Linear address, low 16 bits (l)
$4C SDMA Source Address High .... hhhh RW8 Linear address, high 4 bits (h)
$4E SDMA Length Low llll llll llll llll RW16 Length, low 16 bits (l)
$50 SDMA Length High .... hhhh RW8 Length, high 4 bits (h)
$52 SDMA Control ed.t rhff RW8 Enable (e), Decrement (d), Target (t),

Repeat (r), Hold (h), Frequency (f)

SoC(color) $60 System Control 2 c4C. i?sl RW8 Color (c), 4BPP (4), Chunky (C),

Cart I/O wait state (i), SRAM wait state (s),
Cart clock speed (l).

$62 System Control 3 S... ...p RW8 SwanCrystal (S), Power off (p)
Hyper Voice(color) $64 Hyper Voice Left Output ssss ssss ssss ssss W16 Raw sample (s)
$66 Hyper Voice Right Output ssss ssss ssss ssss W16 Raw sample (s)
$69 Hyper Voice Right Input ssss ssss W8 Sample (s)
$6A Hyper Voice Control .mmc ???? errr ffss RW16 Mask (m), Channel reset (c), Enable (e),

Rate (r), Format (f), Shift (s)

Display(SC) $70 LCD Timing Configuration 1? ???? ???? RL8
$71 LCD Timing Configuration 2? ???? ???? RL8
$72 LCD Timing Configuration 3? ???? ???? RL8
$73 LCD Timing Configuration 4? ???? ???? RL8
$74 LCD Timing Configuration 5? ???? ???? RL8
$75 LCD Timing Configuration 6? ???? ???? RL8
$76 LCD Timing Configuration 7? ???? ???? RL8
$77 LCD Timing Configuration 8? ???? ???? RL8
Sound $80 Sound Channel 1 Frequency .... .ddd dddd dddd RW16 Divider (d)
$82 Sound Channel 2 Frequency .... .ddd dddd dddd RW16 Divider (d)
$84 Sound Channel 3 Frequency .... .ddd dddd dddd RW16 Divider (d)
$86 Sound Channel 4 Frequency .... .ddd dddd dddd RW16 Divider (d)
$88 Sound Channel 1 Volume llll rrrr RW8 Left (l), Right (r)
$89 Sound Channel 2 Volume llll rrrr RW8 Left (l), Right (r)
Sound Channel 2 Voice Sample ssss ssss RW8 Sample (s)
$8A Sound Channel 3 Volume llll rrrr RW8 Left (l), Right (r)
$8B Sound Channel 4 Volume llll rrrr RW8 Left (l), Right (r)
$8C Sound Channel 3 Sweep Amount vvvv vvvv RW8 Value (v)
$8D Sound Channel 3 Sweep Ticks ...t tttt RW8 Ticks (t)
$8E Sound Channel 4 Noise Control ...e rttt RW8 Enable (e), Reset (r), Tap (t)
$8F Sound Wavetable Address wwww wwww RW8 Address >> 6 (w)
$90 Sound Channel Control nsv. 4321 RW8 Channel enable (1234)

Noise (n), Sweep (s), Voice (v)

$91 Sound Output Control H... hrrs RW8 Headphones connected (H)

Headphone output (h) Speaker output (s), range (r)

$92 Sound Channel 4 LFSR Register .rrr rrrr rrrr rrrr R16 PRNG state (r)
$94 Sound Channel 2 Voice Volume .... lLrR RW8 Left Half (l), Full (L)

Right Half (r), Full (R)

$95 Sound Test 425? ???h RW8
$96 Sound Channel Output Right .... ..ss ssss ssss R16 Sample (s)
$98 Sound Channel Output Left .... ..ss ssss ssss R16 Sample (s)
$9A Sound Channel Output Sum .... .sss ssss ssss R16 Sample (s)
$9E Sound Speaker Main Volume(color) .... ..vv RW8 Main volume (v)
SoC $A0 System Control t??? swcl RW8 Test OK (t), ROM wait state (s), ROM width (w),

Color system (c), Boot ROM lockout (l)

Timers $A2 Timer Control .... VvHh RW8 Horizontal enable (h), auto reload (H)

Vertical enable (v), auto reload (V)

$A4 Horizontal Blank Timer Reload tttt tttt tttt tttt RW16 Ticks (t)
$A6 Vertical Blank Timer Reload tttt tttt tttt tttt RW16 Ticks (t)
$A8 Horizontal Blank Timer Counter tttt tttt tttt tttt R16 Ticks (t)
$AA Vertical Blank Timer Counter tttt tttt tttt tttt R16 Ticks (t)
? $AC ? .... ...p W8? Power off (p)
Interrupts $B0 Interrupt Vector Offset VVVV V... W8 Vector offset (V)
Interrupt Vector Request vvvv vvvv R8 Requested vector offset (v)
UART $B1 Serial Receive Data dddd dddd R8 Receive buffer data (d)
$B1 Serial Transmit Data dddd dddd W8 Transmit buffer data (d)
Interrupts $B2 Interrupt Enable iiii iiii RW8 Interrupt index (i)
UART $B3 Serial Status eb.. .tor R8 Enable (e), Baud rate (b),

Transfer ready (t), Overrun (o), Receive ready (r)

$B3 Serial Control ebO. .... W8 Enable (e), Baud rate (b), Reset Overrun (O)
Interrupts $B4 Interrupt Status iiii iiii R8 Interrupt index (i)
Keypad $B5 Keypad Scan .iii oooo RW8 Input row (i), Output column (o)
Interrupts $B6 Interrupt Acknowledge iiii iiii W8 Interrupt index (i)
$B7 Interrupt NMI Control ...b .... RW8 Low battery (b)
Internal EEPROM $BA Internal EEPROM Data dddd dddd dddd dddd RW16 Data (d)
$BC Internal EEPROM Command RW16
$BE Internal EEPROM Status .... .... p... ..RD R16 Protected (p), Ready (R), Done (D)
Internal EEPROM Control .... .... pewr .... W16 Protect (p), Erase (e), Write (w), Read (r)
Cartridge $C0
...

$FF

Cartridge I/O RW8 Forwarded by the SoC

I/O port routing

The NEC V30MZ supports 16-bit I/O port addresses. The WonderSwan SoC routes them using the following algorithm:

  • If an address is between $00B8 and $00BF inclusive, it is routed to the internal EEPROM control block.
  • If an address is between $00C0 and $00FF inclusive, it is routed to the cartride bus.
  • If an address's bits 0 through 8 inclusive are between $000 and $0B7 inclusive, they are routed to the SoC block.
  • If none of these conditions are reached, open bus is read.

On the monochrome models, as well as color models in mono emulation, open bus is always 0x90.

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