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- 17:46, 24 November 2024 WonderWitch/Flash (hist | edit) [1,063 bytes] Asie (talk | contribs) (Created page with "The WonderWitch cartridge features a 512KiB flash chip - the MBM29DL400TC. While the WonderSwan SoC pervents writes to the ROM area, it can be written to via the SRAM area using port $CE on the Bandai 2003 mapper. TODO: Document commands. == Links == * [https://github.com/up-n-atom/WonderWitch/blob/main/Datasheets/MBM29DL400BC-12PFTN_to_MBM29DL400TC-90PFTN.pdf Datasheet]")
- 16:39, 20 October 2024 WonderWitch/FreyaBIOS/System (hist | edit) [3,653 bytes] Asie (talk | contribs) (Created page with "The System interrupt provides assorted system-related functionality. == Types == === Suspend/resume structure === This structure is stored in SRAM block 3, offset <code>$7E00</code> (core 1) and <code>$BF00</code> (core 0). {| class="wikitable" |- ! Offset !! Size !! Contents |- | $0000 || 16384 || Copy of RAM area <code>$0000</code> - <code>$3FFF</code> |- | $4000 || 2 || Stack segment? |- | $4002 || 2 || Data segment? |- | $4004 || 224 || Copy of IO ports <code>$00...")
- 19:13, 19 October 2024 WonderWitch/Memory map (hist | edit) [3,855 bytes] Asie (talk | contribs) (Created page with "== Memory map == {| class="wikitable" |+ WonderWitch memory map ! Address ! ASCII, 1 screen ! ASCII, 2 screens ! Shift-JIS, 1 screen ! Shift-JIS, 2 screens |- | style="text-align: center;" | 0x0000 | colspan="4" style="text-align: center;" | Interrupt vectors |- | style="text-align: center;" | 0x0100 | colspan="4" style="text-align: center;" | ? |- | style="text-align: center;" | 0x0E00 | rowspan="7" style="text-align: center;" | | rowspan="5" style="text-align: center;...")
- 12:51, 19 October 2024 WonderWitch/IL/IlibIL (hist | edit) [591 bytes] Asie (talk | contribs) (Created page with "IlibIL is a library used to load other indirect libraries present on the system. == Functions == === open === <code>int open(const char far *name, IL far *buffer);</code> Load the specified IL <code>name</code> from <code>/rom0</code> or <code>/kern</code>. The IL header is copied to the provided <code>buffer</code> with addresses appropriately relocated to match the IL's location in ROM. === open_system === <code>int open_system(const char far *name, IL far *buffe...")
- 12:01, 19 October 2024 WonderWitch/IL/ResumeIL (hist | edit) [456 bytes] Asie (talk | contribs) (Created page with "== ResumeIL == ResumeIL is a library which augments the process suspend/resume functionality of the built-in ProcIL library to also archive the memory areas <code>0x4000 - 0xBFFF</code> (WSC expanded/4bpp tile memory) and <code>0xFE00 - 0xFFFF</code> (WSC palette memory). This is done by copying this memory to <code>/ram0/resume.dat</code>. === Limitations === - This approach only allows suspending and resuming one process.")
- 11:19, 19 October 2024 WonderWitch/FreyaBIOS/Timer (hist | edit) [2,022 bytes] Asie (talk | contribs) (Created page with "The Timer interrupt provides an abstraction layer for the WonderSwan's timers, as well as the on-cartridge RTC. == Types == === RTC fields === The RTC field indexes match the order of fields returned by the RTC chip. Note that FreyaBIOS transparently converts the values to and from BCD. {| class="wikitable" |- ! Index !! Data !! Format |- | 0 || Year || 0 - 99; 0 is assumed to be the year 2000. |- | 1 || Month || 1 - 12 |- | 2 || Date...")
- 18:02, 18 October 2024 WonderWitch/Process (hist | edit) [2,531 bytes] Asie (talk | contribs) (Created page with "== Memory layout == Process memory is stored in SRAM banks 3 (process 0 - typically used by FreyaOS), 2 (process 1) and 1 (process 2). The entire bank is available to the process. === Process control block === The process control block contains information about the running process. It is stored in the first 96 bytes of data. {| class="wikitable" |+ Process control block structure |- ! Offset !! Length !! Contents |- | 0 || 4 || Compiler ID, zero-terminated string; s...")
- 15:53, 18 October 2024 WonderWitch/IL (hist | edit) [2,441 bytes] Asie (talk | contribs) (Created page with "Indirect libraries (IL) are a FreyaOS feature designed to work around the 64KB segment limit of applications by offloading helper functionality to separate library binaries. == Calling convention == All functions exposed by an IL use the standard 8086 C calling convention - cdecl. * The stack is allocated and cleaned by the caller. * <code>AX</code>, <code>BX</code>, <code>CX</code>, <code>DX</code> can be modified freely by the callee. All other registers must be res...")
- 14:21, 17 October 2024 WonderWitch/Filesystem (hist | edit) [1,507 bytes] Asie (talk | contribs) (Created page with "== Mount points == {| class="wikitable" |+ FreyaOS mount points |- ! Path !! File data location !! File table location !! File table size (entries) !! Description |- | <code>/rom0</code> || ROM (384 KB) || SRAM bank 3, $16F2 || 128 || |- | <code>/ram0</code> || SRAM bank 0 (64 KB) || SRAM bank 3, $06F2 || 64 || |- | <code>/</code> || || SRAM bank 3, $02F2 || 16 || |} == File table entry format == {| class="wikitable" |+ Header contents |- ! Offset !! Length !! Conten...")
