KARNAK
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KARNAK was only used in Pocket Challenge V2 edutainment games.
It is not yet well-documented. It is thought to be a revision of Bandai 2003 that removes the RTC interface, and adds a timer IRQ and a hardware IMA ADPCM decoder.
This page should not be taken as authoritative: it has been pieced together from multiple other pieces of research. It is unclear if the GPO and Self-Flash registers exist; from PCB photos the Self-Flash register is unused if it does exist.
Category | Port | Description | Bits | Type | Notes |
---|---|---|---|---|---|
GPO | $CC | GPO Data Direction | 0000 oooo | RW8 | 1 = output, 0 = high-impedance (weak pull-down) |
$CD | GPO Data | 0000 dddd | RW8 | 1 = 3V, if enabled by data direction | |
Self-Flash | $CE | Self-Flash Control | 0000 000r | RW8 | 1 = ROM is accessible at segment 0x1000;
0 = RAM instead. |
Extended bankswitching | $CF | ROM Linear (EX) Bank | 00bb bbbb | RW8 | Selects a 1MiB bank accessed via segments 0x4000 through 0xF000. Identical to the register at 0xC0. |
$D0 | RAM(/ROM) Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x1000. Lower 8 bits are identical to the register at 0xC1. | |
$D2 | ROM0 Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x2000. Lower 8 bits are identical to the register at 0xC2. | |
$D4 | ROM1 Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x3000. Lower 8 bits are identical to the register at 0xC3. | |
Timer | $D6 | Programmable Interval Timer | eppp pppp | RW8 | Enable (e); Period (p). Units are the 384kHz clock to the cartridge. |
ADPCM | $D8 | packed data | ? | W8 | Write two-sample packed ADPCM byte |
unpacked data | ? | R16 | Read two one-byte unpacked PCM bytes |
Not all PCBs are wired to support self-flashing. Not all ROMs have the needed /BYTE pin. Even on PCBs without support, ROM can still be enabled by writing to port $CE.