Bandai 2003: Difference between revisions

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m (clarify terminology)
(split out usage information from command notes, more compact command representation)
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| style="text-align: right" | <tt style="white-space: nowrap">D00B CCCC</tt>
| style="text-align: right" | <tt style="white-space: nowrap">D00B CCCC</tt>
| R8
| R8
| Busy (B), Command (C), Data needed (D)
| Busy (B), Command (C), Ready (R)
|-
|-
! $CB
! $CB
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Note that the SRAM memory area is always accessed in byte as opposed to word mode. This means that, if the ROM/flash chip is normally accessed in word mode, the $CE port will only work correctly with the /BYTE pin connected to the mapper.
== Real-Time Clock ==


== Real-Time Clock interface ==
The 2003's RTC interface is a simple half-duplex SPI-like protocol.


The 2003's RTC interface is a simple half-duplex SPI-like protocol. A write to $CA will start a transaction, depending on the exact value written.
For specifics of what the S-3511A expects to be done with these bytes, see [[Real-Time Clock]].


If there is no external S-3511A, all bytes will read back as $FF due to a weak pull-up inside the 2003.
=== Usage ===


For specifics of what the S-3511A expects to be done with these bytes, see [[Real-Time Clock]].
Writing a valid command to port <tt>$CA</tt> will start a transaction.


(Put logic analyzer traces here)
The Busy bit is set for the duration of a command transaction being processed, including when payload bytes are expected to be written or read.


Values are as follows:
The Ready bit is set when <tt>$CB</tt> is ready for access. It is cleared when a payload byte is written (for commands which expect writes), read (for commands which expect reads), or either written or read (when the Busy bit is clear).


=== $00-$0F, $1C-$1F ===
For commands which require bytes to be sent, the first byte should be written to port <tt>$CB</tt> before starting the command with a port <tt>$CA</tt> write. The 2003 will pause for subsequent bytes and set bit 7, if necessary.
Immediately stop the transaction. This cannot be safely used to abort an ongoing transaction, because the 2003 still relays the 384kHz clock. In contrast, normal termination stops relaying that clock.


=== $10, $11 ===
For commands which return bytes to be read, they can be accessed through port <tt>$CB</tt> after the Ready bit is set or if the Busy bit is clear.
Send command byte ($60 or $61 respectively) and stop.


=== $12 ===
If there is no external S-3511A, all bytes will read back as $FF due to a weak pull-up inside the 2003.
Send command byte ($62), then send byte stored in $CB, then stop. The 2003 expects that the value in $CB is valid and does not pause if the CPU hasn't yet written a value.


=== $13 ===
=== Commands ===
Send command byte ($63), then receive byte, then stop. After the "data needed" is set or the "busy" bit is clear the value can be read from $CB.


=== $14 ===
Each valid command sends its command byte, followed by a fixed number of payload bytes to be sent or received.
Send command byte ($64), then send seven bytes of payload, then stop. The 2003 expects that the ''first'' byte is preloaded in $CB, but pauses for the CPU to write each subsequent byte by setting the "Data needed" bit.


=== $15 ===
Invalid commands immediately stop the transaction. This cannot be safely used to abort an ongoing transaction, because the 2003 still relays the 384kHz clock. In contrast, normal termination stops relaying that clock.
Send command byte ($65), then receive seven bytes of payload, then stop. The 2003 pauses for the CPU to read each subsequent byte by setting the "Data needed" bit.


=== $16 ===
{| class="wikitable"
Send command byte ($66), then send three bytes of payload, then stop.
! Command
! Command byte
! Bytes sent
! Bytes received
|-
| <tt>$00</tt> - <tt>$0F</tt>
| colspan="3" style="text-align:center;" | N/A
|-
| <tt>$10</tt>
| <tt>$60</tt>
| colspan="2" | None
|-
| <tt>$11</tt>
| <tt>$61</tt>
| colspan="2" | None
|-
| <tt>$12</tt>
| <tt>$62</tt>
| style="text-align:right;" | 1
|
|-
| <tt>$13</tt>
| <tt>$63</tt>
|
| style="text-align:right;" | 1
|-
| <tt>$14</tt>
| <tt>$64</tt>
| style="text-align:right;" | 7
|
|-
| <tt>$15</tt>
| <tt>$65</tt>
|
| style="text-align:right;" | 7
|-
| <tt>$16</tt>
| <tt>$66</tt>
| style="text-align:right;" | 3
|
|-
| <tt>$17</tt>
| <tt>$67</tt>
|
| style="text-align:right;" | 3
|-
| <tt>$18</tt>
| <tt>$68</tt>
| style="text-align:right;" | 2
|
|-
| <tt>$19</tt>
| <tt>$69</tt>
|
| style="text-align:right;" | 2
|-
| <tt>$1A</tt>
| <tt>$6A</tt>
| style="text-align:right;" | 2
|
|-
| <tt>$1B</tt>
| <tt>$6B</tt>
|
| style="text-align:right;" | 2
|-
| <tt>$1C</tt> - <tt>$1F</tt>
| colspan="3" style="text-align:center;" | N/A
|}


=== $17 ===
== Self-flashing ==
Send command byte ($67), then receive three bytes of payload, then stop.


=== $18, $1A ===
The 2003 mapper allows mapping the ROM chip in the PSRAM area using the <tt>$CE</tt> port. This can be used for writing to a NOR flash chip acting as the cartridge's ROM.
Send command byte ($68 or $6A), then send two bytes of payload, then stop.


=== $19, $1B ===
Note that the SRAM memory area is always accessed in byte as opposed to word mode. This means that, if the ROM/flash chip is normally accessed in word mode, the $CE port will only work correctly with the /BYTE pin connected to the mapper.
Send command byte ($69 or $6B), then receive two bytes of payload, then stop.


== Lockout ==
== Lockout ==


Unlike the 2001 mapper, the 2003 mapper checks for the address line changes which are part of the authentication handshake after power-up. Until this handshake occurs, ROM access is inhibited. (TODO: How exactly?)
Unlike the 2001 mapper, the 2003 mapper checks for the address line changes which are part of the authentication handshake after power-up. Until this handshake occurs, ROM access is inhibited. (TODO: How exactly?)

Revision as of 16:40, 15 March 2025

The Bandai 2003 (LUXSOR2) is one of the two mappers used in WonderSwan cartridges.

In addition to the normal Mapper banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM.

Category Port Description Bits Type Notes
RTC $CA RTC Command ...1 CCCC W8 Command (C)
RTC Status D00B CCCC R8 Busy (B), Command (C), Ready (R)
$CB RTC Payload dddd dddd RW8 Data (d)
GPO $CC GPO Data Direction 0000 oooo RW8 1 = output, 0 = high-impedance (weak pull-down)
$CD GPO Data 0000 dddd RW8 1 = 3V, if enabled by data direction
Self-Flash $CE Self-Flash Control 0000 000r RW8 1 = ROM is accessed via the 0x10000 - 0x1FFFF memory region.

0 = RAM is accessed via the region.

Extended bankswitching $CF ROM Linear (EX) Bank 00bb bbbb RW8 Selects a 1MiB bank accessed via memory addresses 0x40000 - 0xFFFFF.

Identical to the $C0 port.

$D0 RAM(/ROM) Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via memory addresses 0x10000 - 0x1FFFF.

Lower 8 bits are identical to the $C1 port.

$D2 ROM0 Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via memory addresses 0x20000 - 0x2FFFF.

Lower 8 bits are identical to the $C2 port.

$D4 ROM1 Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via memory addresses 0x30000 - 0x3FFFF.

Lower 8 bits are identical to the $C3 port.

Real-Time Clock

The 2003's RTC interface is a simple half-duplex SPI-like protocol.

For specifics of what the S-3511A expects to be done with these bytes, see Real-Time Clock.

Usage

Writing a valid command to port $CA will start a transaction.

The Busy bit is set for the duration of a command transaction being processed, including when payload bytes are expected to be written or read.

The Ready bit is set when $CB is ready for access. It is cleared when a payload byte is written (for commands which expect writes), read (for commands which expect reads), or either written or read (when the Busy bit is clear).

For commands which require bytes to be sent, the first byte should be written to port $CB before starting the command with a port $CA write. The 2003 will pause for subsequent bytes and set bit 7, if necessary.

For commands which return bytes to be read, they can be accessed through port $CB after the Ready bit is set or if the Busy bit is clear.

If there is no external S-3511A, all bytes will read back as $FF due to a weak pull-up inside the 2003.

Commands

Each valid command sends its command byte, followed by a fixed number of payload bytes to be sent or received.

Invalid commands immediately stop the transaction. This cannot be safely used to abort an ongoing transaction, because the 2003 still relays the 384kHz clock. In contrast, normal termination stops relaying that clock.

Command Command byte Bytes sent Bytes received
$00 - $0F N/A
$10 $60 None
$11 $61 None
$12 $62 1
$13 $63 1
$14 $64 7
$15 $65 7
$16 $66 3
$17 $67 3
$18 $68 2
$19 $69 2
$1A $6A 2
$1B $6B 2
$1C - $1F N/A

Self-flashing

The 2003 mapper allows mapping the ROM chip in the PSRAM area using the $CE port. This can be used for writing to a NOR flash chip acting as the cartridge's ROM.

Note that the SRAM memory area is always accessed in byte as opposed to word mode. This means that, if the ROM/flash chip is normally accessed in word mode, the $CE port will only work correctly with the /BYTE pin connected to the mapper.

Lockout

Unlike the 2001 mapper, the 2003 mapper checks for the address line changes which are part of the authentication handshake after power-up. Until this handshake occurs, ROM access is inhibited. (TODO: How exactly?)