Bandai 2003: Difference between revisions
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In addition to the normal [[ | In addition to the normal [[Mapper]] banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM. | ||
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Revision as of 18:42, 20 August 2023
In addition to the normal Mapper banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM.
| Category | Port | Description | Bits | Type | Notes |
|---|---|---|---|---|---|
| RTC | $CA | RTC Command | ...1 CCCC | W8 | Command (C) |
| RTC Status | D..B CCCC | R8 | Busy (B), Command (C), Data needed (D) | ||
| $CB | RTC Payload | dddd dddd | RW8 | Data (d) | |
| GPO | $CC | GPO Data Direction | 0000 oooo | RW8 | 1 = output, 0 = high-impedance (weak pull-down) |
| $CD | GPO Data | 0000 dddd | RW8 | 1 = 3V, if enabled by data direction | |
| Self-Flash | $CE | Self-Flash Control | 0000 000r | RW8 | 1 = ROM is accessible at segment 0x1000;
0 = RAM instead. |
| Extended bankswitching | $CF | ROM Linear (EX) Bank | 00bb bbbb | RW8 | Selects a 1MiB bank accessed via segments 0x4000 through 0xF000. Identical to the register at 0xC0. |
| $D0 | RAM(/ROM) Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x1000. Lower 8 bits are identical to the register at 0xC1. | |
| $D2 | ROM0 Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x2000. Lower 8 bits are identical to the register at 0xC2. | |
| $D4 | ROM1 Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x3000. Lower 8 bits are identical to the register at 0xC3. |
Not all PCBs are wired to support self-flashing. Not all ROMs have the needed /BYTE pin. Even on PCBs without support, ROM can still be enabled by writing to port $CE.
