Bandai 2003: Difference between revisions

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The Bandai 2003 (LUXSOR2) is one of the two mappers used in WonderSwan cartridges.
In addition to the normal [[Mapper]] banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM.
In addition to the normal [[Mapper]] banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM.


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| style="text-align: right" | <tt style="white-space: nowrap">0000 000r</tt>
| style="text-align: right" | <tt style="white-space: nowrap">0000 000r</tt>
| RW8
| RW8
| 1 = ROM is accessible at segment 0x1000;
| 1 = ROM is accessed via the 0x10000 - 0x1FFFF memory region.
0 = RAM instead.
0 = RAM is accessed via the region.
|-
|-
! rowspan="4" | Extended bankswitching
! rowspan="4" | Extended bankswitching
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| style="text-align: right" | <tt style="white-space: nowrap">00bb bbbb</tt>
| style="text-align: right" | <tt style="white-space: nowrap">00bb bbbb</tt>
| RW8
| RW8
| Selects a 1MiB bank accessed via segments 0x4000 through 0xF000. Identical to the register at 0xC0.
| Selects a 1MiB bank accessed via memory addresses 0x40000 - 0xFFFFF.
Identical to the $C0 port.
|-
|-
! $D0
! $D0
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| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt>
| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt>
| RW16
| RW16
| Selects a 64KiB bank accessed via segment 0x1000. Lower 8 bits are identical to the register at 0xC1.
| Selects a 64KiB bank accessed via memory addresses 0x10000 - 0x1FFFF.
Lower 8 bits are identical to the $C1 port.
|-
|-
! $D2
! $D2
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| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt>
| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt>
| RW16
| RW16
| Selects a 64KiB bank accessed via segment 0x2000. Lower 8 bits are identical to the register at 0xC2.
| Selects a 64KiB bank accessed via memory addresses 0x20000 - 0x2FFFF.
Lower 8 bits are identical to the $C2 port.
|-
|-
! $D4
! $D4
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| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt>
| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt>
| RW16
| RW16
| Selects a 64KiB bank accessed via segment 0x3000. Lower 8 bits are identical to the register at 0xC3.
| Selects a 64KiB bank accessed via memory addresses 0x30000 - 0x3FFFF.
Lower 8 bits are identical to the $C3 port.
|}
|}


Not all PCBs are wired to support self-flashing. Not all ROMs have the needed /BYTE pin. Even on PCBs without support, ROM can still be enabled by writing to port $CE.
Note that the SRAM memory area is always accessed in byte as opposed to word mode. This means that, if the ROM/flash chip is normally accessed in word mode, the $CE port will only work correctly with the /BYTE pin connected to the mapper.


== 2003 RTC interface ==
== Real-Time Clock interface ==
The 2003's RTC interface is a simple half-duplex SPI-like protocol. A write to $CA will start a transaction, depending on the exact value written.  
 
The 2003's RTC interface is a simple half-duplex SPI-like protocol. A write to $CA will start a transaction, depending on the exact value written.
 
If there is no external S-3511A, all bytes will read back as $FF due to a weak pull-up inside the 2003.


For specifics of what the S-3511A expects to be done with these bytes, see [[Real-Time Clock]].
For specifics of what the S-3511A expects to be done with these bytes, see [[Real-Time Clock]].
Line 104: Line 113:


=== $16 ===
=== $16 ===
Send command byte ($66), then send three bytes of payload, then stop.bit.
Send command byte ($66), then send three bytes of payload, then stop.


=== $17 ===
=== $17 ===
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=== $18, $1A ===
=== $18, $1A ===
Send command byte ($68 or $6A), then send two bytes of payload, then stop.needed" bit.
Send command byte ($68 or $6A), then send two bytes of payload, then stop.


=== $19, $1B ===
=== $19, $1B ===
Send command byte ($69 or $6B), then receive two bytes of payload, then stop.
Send command byte ($69 or $6B), then receive two bytes of payload, then stop.
== Lockout ==
Unlike the 2001 mapper, the 2003 mapper checks for the address line changes which are part of the authentication handshake after power-up. Until this handshake occurs, ROM access is inhibited. (TODO: How exactly?)

Latest revision as of 17:44, 24 November 2024

The Bandai 2003 (LUXSOR2) is one of the two mappers used in WonderSwan cartridges.

In addition to the normal Mapper banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM.

Category Port Description Bits Type Notes
RTC $CA RTC Command ...1 CCCC W8 Command (C)
RTC Status D00B CCCC R8 Busy (B), Command (C), Data needed (D)
$CB RTC Payload dddd dddd RW8 Data (d)
GPO $CC GPO Data Direction 0000 oooo RW8 1 = output, 0 = high-impedance (weak pull-down)
$CD GPO Data 0000 dddd RW8 1 = 3V, if enabled by data direction
Self-Flash $CE Self-Flash Control 0000 000r RW8 1 = ROM is accessed via the 0x10000 - 0x1FFFF memory region.

0 = RAM is accessed via the region.

Extended bankswitching $CF ROM Linear (EX) Bank 00bb bbbb RW8 Selects a 1MiB bank accessed via memory addresses 0x40000 - 0xFFFFF.

Identical to the $C0 port.

$D0 RAM(/ROM) Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via memory addresses 0x10000 - 0x1FFFF.

Lower 8 bits are identical to the $C1 port.

$D2 ROM0 Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via memory addresses 0x20000 - 0x2FFFF.

Lower 8 bits are identical to the $C2 port.

$D4 ROM1 Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via memory addresses 0x30000 - 0x3FFFF.

Lower 8 bits are identical to the $C3 port.

Note that the SRAM memory area is always accessed in byte as opposed to word mode. This means that, if the ROM/flash chip is normally accessed in word mode, the $CE port will only work correctly with the /BYTE pin connected to the mapper.

Real-Time Clock interface

The 2003's RTC interface is a simple half-duplex SPI-like protocol. A write to $CA will start a transaction, depending on the exact value written.

If there is no external S-3511A, all bytes will read back as $FF due to a weak pull-up inside the 2003.

For specifics of what the S-3511A expects to be done with these bytes, see Real-Time Clock.

(Put logic analyzer traces here)

Values are as follows:

$00-$0F, $1C-$1F

Immediately stop the transaction. This cannot be safely used to abort an ongoing transaction, because the 2003 still relays the 384kHz clock. In contrast, normal termination stops relaying that clock.

$10, $11

Send command byte ($60 or $61 respectively) and stop.

$12

Send command byte ($62), then send byte stored in $CB, then stop. The 2003 expects that the value in $CB is valid and does not pause if the CPU hasn't yet written a value.

$13

Send command byte ($63), then receive byte, then stop. After the "data needed" is set or the "busy" bit is clear the value can be read from $CB.

$14

Send command byte ($64), then send seven bytes of payload, then stop. The 2003 expects that the first byte is preloaded in $CB, but pauses for the CPU to write each subsequent byte by setting the "Data needed" bit.

$15

Send command byte ($65), then receive seven bytes of payload, then stop. The 2003 pauses for the CPU to read each subsequent byte by setting the "Data needed" bit.

$16

Send command byte ($66), then send three bytes of payload, then stop.

$17

Send command byte ($67), then receive three bytes of payload, then stop.

$18, $1A

Send command byte ($68 or $6A), then send two bytes of payload, then stop.

$19, $1B

Send command byte ($69 or $6B), then receive two bytes of payload, then stop.

Lockout

Unlike the 2001 mapper, the 2003 mapper checks for the address line changes which are part of the authentication handshake after power-up. Until this handshake occurs, ROM access is inhibited. (TODO: How exactly?)