Bandai 2003: Difference between revisions
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(create from my notes) |
m (make it clearer that RTC Command and Status are the same port, unify capitalization) |
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| Line 10: | Line 10: | ||
|- | |- | ||
! rowspan="3" | RTC | ! rowspan="3" | RTC | ||
! $CA | ! rowspan="2" | $CA | ||
| RTC Command | | RTC Command | ||
| style="text-align: right" | <tt style="white-space: nowrap">...1 CCCC</tt> | | style="text-align: right" | <tt style="white-space: nowrap">...1 CCCC</tt> | ||
| Line 16: | Line 16: | ||
| Command (C) | | Command (C) | ||
|- | |- | ||
| RTC Status | | RTC Status | ||
| style="text-align: right" | <tt style="white-space: nowrap">D..B CCCC</tt> | | style="text-align: right" | <tt style="white-space: nowrap">D..B CCCC</tt> | ||
| Line 30: | Line 29: | ||
! rowspan="2" | GPO | ! rowspan="2" | GPO | ||
! $CC | ! $CC | ||
| Data | | GPO Data Direction | ||
| style="text-align: right" | <tt style="white-space: nowrap">0000 oooo</tt> | | style="text-align: right" | <tt style="white-space: nowrap">0000 oooo</tt> | ||
| RW8 | | RW8 | ||
| Line 41: | Line 40: | ||
| 1 = 3V, if enabled by data direction | | 1 = 3V, if enabled by data direction | ||
|- | |- | ||
! Self- | ! Self-Flash | ||
! $CE | ! $CE | ||
| | | Self-Flash Control | ||
| style="text-align: right" | <tt style="white-space: nowrap">0000 000r</tt> | | style="text-align: right" | <tt style="white-space: nowrap">0000 000r</tt> | ||
| RW8 | | RW8 | ||
| Line 51: | Line 50: | ||
! rowspan="4" | Extended bankswitching | ! rowspan="4" | Extended bankswitching | ||
! $CF | ! $CF | ||
| | | ROM Linear (EX) Bank | ||
| style="text-align: right" | <tt style="white-space: nowrap">00bb bbbb</tt> | | style="text-align: right" | <tt style="white-space: nowrap">00bb bbbb</tt> | ||
| RW8 | | RW8 | ||
| Line 57: | Line 56: | ||
|- | |- | ||
! $D0 | ! $D0 | ||
| | | RAM(/ROM) Bank | ||
| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt> | | style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt> | ||
| RW16 | | RW16 | ||
| Line 63: | Line 62: | ||
|- | |- | ||
! $D2 | ! $D2 | ||
| | | ROM0 Bank | ||
| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt> | | style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt> | ||
| RW16 | | RW16 | ||
| Line 69: | Line 68: | ||
|- | |- | ||
! $D4 | ! $D4 | ||
| | | ROM1 Bank | ||
| style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt> | | style="text-align: right" | <tt style="white-space: nowrap">0000 00bb bbbb bbbb</tt> | ||
| RW16 | | RW16 | ||
Revision as of 13:11, 19 August 2023
In addition to the normal Cartridge banking interface, Bandai's 2003 adds registers for an RTC interface, GPO pins, self flashing, and accessing more than 16MiB of ROM.
| Category | Port | Description | Bits | Type | Notes |
|---|---|---|---|---|---|
| RTC | $CA | RTC Command | ...1 CCCC | W8 | Command (C) |
| RTC Status | D..B CCCC | R8 | Busy (B), Command (C), Data needed (D) | ||
| $CB | RTC Payload | dddd dddd | RW8 | Data (d) | |
| GPO | $CC | GPO Data Direction | 0000 oooo | RW8 | 1 = output, 0 = high-impedance (weak pull-down) |
| $CD | GPO Data | 0000 dddd | RW8 | 1 = 3V, if enabled by data direction | |
| Self-Flash | $CE | Self-Flash Control | 0000 000r | RW8 | 1 = ROM is accessible at segment 0x1000;
0 = RAM instead. |
| Extended bankswitching | $CF | ROM Linear (EX) Bank | 00bb bbbb | RW8 | Selects a 1MiB bank accessed via segments 0x4000 through 0xF000. Identical to the register at 0xC0. |
| $D0 | RAM(/ROM) Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x1000. Lower 8 bits are identical to the register at 0xC1. | |
| $D2 | ROM0 Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x2000. Lower 8 bits are identical to the register at 0xC2. | |
| $D4 | ROM1 Bank | 0000 00bb bbbb bbbb | RW16 | Selects a 64KiB bank accessed via segment 0x3000. Lower 8 bits are identical to the register at 0xC3. |
Not all PCBs are wired to support self-flashing. Not all ROMs have the needed /BYTE pin. Even on PCBs without support, ROM can still be enabled by writing to port $CE.
