KARNAK: Difference between revisions

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KARNAK was only used in Pocket Challenge V2 edutainment games.  
The KARNAK mapper is only used in some Pocket Challenge V2 edutainment cartridges.


It is not yet well-documented. It is thought to be a revision of [[Bandai 2003]] that removes the RTC interface, and adds a timer IRQ and a hardware IMA ADPCM decoder.
It is not yet well-documented. It is thought to be a revision of [[Bandai 2003]] that removes the RTC interface, and adds a timer IRQ and a hardware IMA ADPCM decoder.
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|-
|-
! rowspan=2|ADPCM
! rowspan=2|ADPCM
! rowspan=2|$D8
! $D8
| packed data
| Packed data
| ?
| ?
| W8
| W8?
| Write two-sample packed ADPCM byte
| Write two-sample packed ADPCM byte
|-
|-
| unpacked data
! $D9
| Unpacked data
| ?
| ?
| R16
| R8?
| Read two one-byte unpacked PCM bytes
| Read two one-byte unpacked PCM bytes, in sequence
|}
|}
== Timer ==
If enabled, the timer will emit a [[Interrupts|cartridge interrupt]] every <code>((period + 1) * 2)</code> cartridge clocks, where "one cartridge clock" = 384KHz = 1/8th CPU clock.

Latest revision as of 11:17, 23 August 2023

The KARNAK mapper is only used in some Pocket Challenge V2 edutainment cartridges.

It is not yet well-documented. It is thought to be a revision of Bandai 2003 that removes the RTC interface, and adds a timer IRQ and a hardware IMA ADPCM decoder.

This page should not be taken as authoritative: it has been pieced together from multiple other pieces of research. It is unclear if the GPO and Self-Flash registers exist; from PCB photos the Self-Flash register is unused if it does exist.

Category Port Description Bits Type Notes
GPO $CC GPO Data Direction 0000 oooo RW8 1 = output, 0 = high-impedance (weak pull-down)
$CD GPO Data 0000 dddd RW8 1 = 3V, if enabled by data direction
Self-Flash $CE Self-Flash Control 0000 000r RW8 1 = ROM is accessible at segment 0x1000;

0 = RAM instead.

Extended bankswitching $CF ROM Linear (EX) Bank 00bb bbbb RW8 Selects a 1MiB bank accessed via segments 0x4000 through 0xF000. Identical to the register at 0xC0.
$D0 RAM(/ROM) Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via segment 0x1000. Lower 8 bits are identical to the register at 0xC1.
$D2 ROM0 Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via segment 0x2000. Lower 8 bits are identical to the register at 0xC2.
$D4 ROM1 Bank 0000 00bb bbbb bbbb RW16 Selects a 64KiB bank accessed via segment 0x3000. Lower 8 bits are identical to the register at 0xC3.
Timer $D6 Programmable Interval Timer eppp pppp RW8 Enable (e); Period (p). Units are the 384kHz clock to the cartridge.
ADPCM $D8 Packed data ? W8? Write two-sample packed ADPCM byte
$D9 Unpacked data ? R8? Read two one-byte unpacked PCM bytes, in sequence

Timer

If enabled, the timer will emit a cartridge interrupt every ((period + 1) * 2) cartridge clocks, where "one cartridge clock" = 384KHz = 1/8th CPU clock.