View source for NEC V30MZ interrupts

The NEC V30MZ provides six of the eight interrupts provided by the 80186.

== Interrupts ==

=== INT 0 - Divide Error ===

This interrupt is emitted as the result of a DIV<sup>IDIV</sup> or DIVU<sup>DIV</sup> instruction.

=== INT 1 - Single Step/Break ===

This interrupt is emitted if the single step flag is set after executing an instruction. (The instruction which changed the single step flag is ignored.) The single step flag is cleared for the duration of the interrupt, allowing the user to store state and perform debug activities; it is then restored when returning from the interrupt, by restoring the original processor flags stored on the stack.

=== INT 2 - Non-Maskable interrupt (NMI) ===

This interrupt is emitted when the SoC requests a non-maskable interrupt. On the WonderSwan, the condtions for emitting an NMI are configured by the relevant I/O port.

=== INT 3 - Breakpoint ===

This interrupt is emitted by the INT 3<sup>BRK</sup> instruction. Unlike other unconditional interrupt instructions, it is encoded with only one byte.

=== INT 4 - Overflow ===

This interrupt is emitted by the INTO<sup>BRKV</sup> instruction, if the overflow flag is set while it is being executed.

=== INT 5 - Array Bounds ===

This interrupt is emitted only by the BOUND<sup>CHKIND</sup> instruction.

== Timing ==

TODO

== Notes ==

* The following 80186 interrupts are not implemented:
** INT 6 - Unused Opcode - the V30MZ treats most unimplemented instructions as NOPs.
** INT 7 - ESC Opcode - the V30MZ, likewise, treats these instructions as NOPs.