UART: Revision history

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Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

22 August 2023

  • curprev 12:0512:05, 22 August 2023‎ Fiskbit talk contribs‎ 1,635 bytes +113‎ Splits Serial Data into Serial Receive Data and Serial Transmit Data
  • curprev 11:3011:30, 22 August 2023‎ Fiskbit talk contribs‎ 1,522 bytes +264‎ Fixes data register. Adds register addresses and access types. Splits Serial Control into Status and Control.
  • curprev 10:5110:51, 22 August 2023‎ Fiskbit talk contribs‎ m 1,258 bytes +10‎ Register formatting.
  • curprev 06:0706:07, 22 August 2023‎ Lidnariq talk contribs‎ m 1,248 bytes −3‎ forgot start bits in byte rates
  • curprev 05:4005:40, 22 August 2023‎ Asie talk contribs‎ 1,251 bytes +1,251‎ Created page with "The WonderSwan's EXT port features an UART operating with the following configuration: * 9,600 or 38,400 bps (bauds per second), * 8N1 (8 data bits followed by 1 stop bit, no parity). This allows for an effective maximum transfer speed of ~1066 or ~4266 bytes per second, respectively. The hardware also features a one-byte transmit and receive buffer, which allows for a slight delay in code when handling data to/from the console. == Interrupts == The UART features tw..."
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