NEC V30MZ flags

NEC V30MZ flags

Layout

The V30MZ processor features a 16-bit flag register:

15  bit  8  7  bit  0
 ---- ----  ---- ----
 m111 odit  sz0a 0p1c
 |    ||||  || |  | |
 |    ||||  || |  | +- Carry (CFCY)
 |    ||||  || |  +--- Parity (PFP)
 |    ||||  || +------ Auxillary Carry (AFAC)
 |    ||||  |+-------- Zero (Z)
 |    ||||  +--------- Sign (S)
 |    |||+------------ Single StepBreak (TFBRK)
 |    ||+------------- Interrupt Enable (IFIE)
 |    |+-------------- Direction (DFDIR)
 |    +--------------- Overflow (OFV)
 +-------------------- Mode (MD)

Status flags

The following flags are typically modified by instructions:

Carry

Stores the carry/borrow state of the last arithmetic operation, or the bit shifted to it for shift/rotate operations.

Parity

Set to 1 if, after arithmetic and logical operations, the lower 8 bits of the result are even.

Auxillary Carry

Stores the carry state from the lower 4-bit nibble (bits 0-3) to the higher 4-bit nibble (bits 4-7), or the borrow state from the higher nibble to the lower nibble.

Zero

Set to 1 if, after arithmetic and logical operations, the result is equal to zero.

Sign

Set to 1 if, after arithmetic and logical operations, the highest bit of the result is set.

Overflow

Set to 1 if an overflow occured as part of the arithmetic operation.

Control flags

The following flags are typically modified by the developer:

Single step

If set to 1, after every instruction, a software interrupt (vector 1) is generated.

Alternatively referred to as the trap flag.

Interrupt enable

If set to 1, enables maskable interrupt handling via the interrupt vector table; cleared to 0 as part of interrupt handling and restored by the IRET opcode.

Direction

If set to 1, string instructions decrement pointers as part of their operation; if set to 0, the pointers are to be incremented.

Mode

This flag does nothing on the NEC V30MZ. It was used to implement 8080 emulation mode in other V20/V30-family chips, but this functionality has been removed in the V30MZ.