NEC V30MZ

The NEC V30MZ is the CPU component of the WonderSwan SoC.

Unlike the NEC V20/V30 CPU family, the V30MZ is fully compatible with the Intel 80186's documented behaviour, as well as some of its undocumented behaviour (such as the SALC opcode); it also omits the V20/V30's opcode extensions.

The NEC V30MZ datasheet uses distinct names for opcodes and registers (NEC names); as all homebrew compilers and assemblers for the platform utilize Intel's official naming (Intel names), the latter is what the wiki - and most community tooling - has standardized on.

Architecture

For this section, elements of the architecture which have distinct NEC names are provided in the following format: Intel^NEC.

Registers

• Four 16-bit general-purpose registers, with their (low, high) components accessible as individual 8-bit sub-registers:
  • AX^AW (AL, AH)
  • BX^BW (BL, BH)
  • CX^CW (CL, CH)
  • DX^DW (DL, DH)
• Four additional 16-bit registers:
  • SI^IX
  • DI^IY
  • SP - stack pointer; the stack is always addressed in the stack segment (so as SS:SP far addresses).
  • BP
• Four segment registers:
  • CS^PS - code segment,
  • DS^DS0 - data segment,
  • ES^DS1 - additional data segment,
  • SS - stack segment.
• IP^PC - instruction pointer; instructions are always addressed in the code segment (so as CS:IP far addresses),
• FLAGS^PSW - 16-bit processor flag register.

While the eight registers can be used in a general-purpose manner, some opcodes are constrained to only using certain registers:

• AX benefits from more compact encoding for certain instructions; it's also used as an output and input register in multiplication/division, port access, BCD conversions, and (as AL) in the XCHG opcode.
• CX is used for loop and repeat instructions as a counter.
• DX can be used used as the address register for port access, it is also used as an output register for word multiplication/division.
• BX, SI, and DI can be used as indices for accessing data in tables in the DS segment (or other segments when overridden).
  • SI and DI are, in addition, used as source and destination pointers by string instructions.
• Similarly, BP can be used as an index for accessing stack data; this makes it particularly useful as a frame pointer.

Flags

The V30MZ features the following flags:

15  bit  8  7  bit  0
 ---- ----  ---- ----
 m111 odit  sz0a 0p1c
 |    ||||  || |  | |
 |    ||||  || |  | +- Carry (CFCY)
 |    ||||  || |  +--- Parity (PFP)
 |    ||||  || +------ Auxillary Carry (AFAC)
 |    ||||  |+-------- Zero (Z)
 |    ||||  +--------- Sign (S)
 |    |||+------------ Single StepBreak (TFBRK)
 |    ||+------------- Interrupt Enable (IFIE)
 |    |+-------------- Direction (DFDIR)
 |    +--------------- Overflow (OFV)
 +-------------------- Mode (MD)

In general, they are set by operations as follows:

• Carry - stores the carry/borrow state of the last arithmetic operation, or the bit shifted to it for shift/rotate operations.
• Parity - set to 1 if, after arithmetic and logical operations, the lower 8 bits of the result are even.
• Auxillary Carry - stores the carry state from the lower 4-bit nibble (bits 0-3) to the higher 4-bit nibble (bits 4-7), or the borrow state from the higher nibble to the lower nibble.
• Zero - set to 1 if, after arithmetic and logical operations, the result is equal to zero.
• Sign - set to 1 if, after arithmetic and logical operations, the highest bit of the result is set.
• Overflow - set to 1 if an overflow occured as part of the arithmetic operation.

There are also programmer-controlled control flags:

• Single Step - if set to 1, after every instruction, a software interrupt (vector 1) is generated.
• Interrupt Enable - if set to 1, enables maskable interrupt handling via the interrupt vector table; cleared to 0 as part of interrupt handling and restored by the IRET opcode.
• Direction - if set to 1, string instructions decrement pointers as part of their operation; if set to 0, the pointers are to be incremented.
• Mode - used for 8080 emulation mode in other V20/V30-family chips, does nothing on V30MZ

Instruction set

V30MZ Instruction Set

Instruction	Opcode (hex)	Opcode (bin)	Bytes	Cycles	Flags	NEC mnemonic	Notes
ADD AL, imm8	04	00000100	2	1	O...SZAPC	ADD AL, imm8
ADD AX, imm16	05	00000101	3	1	O...SZAPC	ADD AW, imm16
ADD mem8, imm8	80 rm / 82 rm	100000.0 oo000mm	3-5	3	O...SZAPC	ADD mem8, imm8

Links

• NEC V30MZ datasheet
• STSWS - CPU - V30MZ/V Series Microprocessor