EEPROM

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Revision as of 16:41, 22 August 2023 by Asie (talk | contribs) (Created page with "The WonderSwan utilizes M93LCx6-compatible EEPROMs: * in the SoC: ** 1 Kbit internal EEPROM (M93LC46-compatible) on the WonderSwan, ** 16 Kbit internal EEPROM (M93LC86-compatible) on the WonderSwan Color, * on cartridges: ** 1 Kbit cartridge EEPROM (M93LC46-compatible) ** 8 Kbit cartridge EEPROM (M93LC76-compatible) ** 16 Kbit cartridge EEPROM (M93LC86-compatible) Additional variants exists which were not seen on any production cartridge: * 2 Kbit EEPROM (M93LC56-comp...")
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The WonderSwan utilizes M93LCx6-compatible EEPROMs:

  • in the SoC:
    • 1 Kbit internal EEPROM (M93LC46-compatible) on the WonderSwan,
    • 16 Kbit internal EEPROM (M93LC86-compatible) on the WonderSwan Color,
  • on cartridges:
    • 1 Kbit cartridge EEPROM (M93LC46-compatible)
    • 8 Kbit cartridge EEPROM (M93LC76-compatible)
    • 16 Kbit cartridge EEPROM (M93LC86-compatible)

Additional variants exists which were not seen on any production cartridge:

  • 2 Kbit EEPROM (M93LC56-compatible)
  • 4 Kbit EEPROM (M93LC66-compatible)

Commands

TODO

I/O ports

The I/O ports listed refer to the internal EEPROM; for the cartridge EEPROM port numbers, refer to the mapper documentation.

Internal EEPROM Data ($BA, $BB)

15  bit  8  7  bit  0
 ---- ----  ---- ----
 dddd dddd  dddd dddd
 |||| ||||  |||| ||||
 ++++-++++--++++-++++- Data read from/written to the EEPROM.

This port functions as a shared buffer for both "read" and "write" modes. (TODO: Verify)

Internal EEPROM Command ($BC, $BD)

  Command Pattern 1

15  bit  8  7  bit  0 
 ---- ----  ---- ----
 0000 0001  ooaa aaaa     (1 Kbit - M93LC46)
 0000 01oo  aaaa aaaa  (2, 4 Kbit - M93LC56/66)
 0001 ooaa  aaaa aaaa (8, 16 Kbit - M93LC76/86)
      ||||  |||| ||||
      ||++--++++-++++- Address (MSb .. LSb)
      ++-------------- Opcode:
                         01 - WRITE
                         10 - READ
                         11 - ERASE
  Command Pattern 2

15  bit  8  7  bit  0 
 ---- ----  ---- ----
 0000 0001  00ss ....     (1 Kbit - M93LC46)
 0000 0100  ss.. ....  (2, 4 Kbit - M93LC56/66)
 0001 00ss  .... .... (8, 16 Kbit - M93LC76/86)
        ||
        ++------------ Sub-Opcode:
                         00 - WDS
                         01 - WRAL
                         01 - ERAL
                         11 - WEN

Internal EEPROM Control ($BE, $BF write)

15  bit  8  7  bit  0 
 ---- ----  ---- ----
 .... ....  pewr ....
            ||||
            |||+------ 1 for READ command, 0 otherwise
            ||+------- 1 for WRITE and WRAL command, 0 otherwise
            |+-------- 1 for ERASE, WDS, ERAL and WEN command, 0 otherwise
            +--------- 1 to enable internal EEPROM write protection.
                       Cannot be cleared once set. 

Internal EEPROM Status ($BE, $BF read)

15  bit  8  7  bit  0 
 ---- ----  ---- ----
 .... ....  p... ..RD
            |      ||
            |      |+- 1 if a READ command has completed.
            |      +-- 0 if the EEPROM is busy,
            |          1 if a command can be accepted (idle).
            +--------- Internal EEPROM write protection:
                       0 = disabled, 1 = enabled

Hardware notes

EEPROM command bits are shifted out starting from the most significant bit of the port.

    +----> EEPROM Serial Data
    |
   [0] <= [0000 0001 ooaa aaaa]
           EEPROM Command Port

While the M93LCx6 family supports byte organization, the WonderSwan always uses word organization. As such, this implementation detail is omitted in this documentation.

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