NEC V30MZ: Difference between revisions

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(add architecture, sketch instruction set)
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** '''SI'''<sup>IX</sup>
** '''SI'''<sup>IX</sup>
** '''DI'''<sup>IY</sup>
** '''DI'''<sup>IY</sup>
** '''SP'''
** '''SP''' - stack pointer; the stack is always addressed in the stack segment (so as <code>SS:SP</code> far addresses).
** '''BP'''
** '''BP'''
* Four segment registers:
* Four segment registers:
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* '''IP'''<sup>PC</sup> - instruction pointer; instructions are always addressed in the code segment (so as <code>CS:IP</code> far addresses),
* '''IP'''<sup>PC</sup> - instruction pointer; instructions are always addressed in the code segment (so as <code>CS:IP</code> far addresses),
* '''FLAGS'''<sup>PSW</sup> - 16-bit processor flag register.
* '''FLAGS'''<sup>PSW</sup> - 16-bit processor flag register.
While the eight registers can be used in a general-purpose manner, some opcodes are constrained to only using certain registers:
* '''AX''' benefits from more compact encoding for certain instructions; it's also used as an output and input register in multiplication/division, port access, BCD conversions, and (as AL) in the XCHG opcode.
* '''CX''' is used for loop and repeat instructions as a counter.
* '''DX''' can be used used as the address register for port access, it is also used as an output register for word multiplication/division.
* '''BX''', '''SI''', and '''DI''' can be used as indices for accessing data in tables in the DS segment (or other segments when overridden).
** '''SI''' and '''DI''' are, in addition, used as source and destination pointers by string instructions.
* Similarly, '''BP''' can be used as an index for accessing stack data; this makes it particularly useful as a frame pointer.


=== Flags ===
=== Flags ===

Revision as of 18:30, 2 August 2024

The NEC V30MZ is the CPU component of the WonderSwan SoC.

Unlike the NEC V20/V30 CPU family, the V30MZ is fully compatible with the Intel 80186's documented behaviour, as well as some of its undocumented behaviour (such as the SALC opcode); it also omits the V20/V30's opcode extensions.

The NEC V30MZ datasheet uses distinct names for opcodes and registers (NEC names); as all homebrew compilers and assemblers for the platform utilize Intel's official naming (Intel names), the latter is what the wiki - and most community tooling - has standardized on.

Architecture

For this section, elements of the architecture which have distinct NEC names are provided in the following format: IntelNEC.

Registers

  • Four 16-bit general-purpose registers, with their (low, high) components accessible as individual 8-bit sub-registers:
    • AXAW (AL, AH)
    • BXBW (BL, BH)
    • CXCW (CL, CH)
    • DXDW (DL, DH)
  • Four additional 16-bit registers:
    • SIIX
    • DIIY
    • SP - stack pointer; the stack is always addressed in the stack segment (so as SS:SP far addresses).
    • BP
  • Four segment registers:
    • CSPS - code segment,
    • DSDS0 - data segment,
    • ESDS1 - additional data segment,
    • SS - stack segment.
  • IPPC - instruction pointer; instructions are always addressed in the code segment (so as CS:IP far addresses),
  • FLAGSPSW - 16-bit processor flag register.

While the eight registers can be used in a general-purpose manner, some opcodes are constrained to only using certain registers:

  • AX benefits from more compact encoding for certain instructions; it's also used as an output and input register in multiplication/division, port access, BCD conversions, and (as AL) in the XCHG opcode.
  • CX is used for loop and repeat instructions as a counter.
  • DX can be used used as the address register for port access, it is also used as an output register for word multiplication/division.
  • BX, SI, and DI can be used as indices for accessing data in tables in the DS segment (or other segments when overridden).
    • SI and DI are, in addition, used as source and destination pointers by string instructions.
  • Similarly, BP can be used as an index for accessing stack data; this makes it particularly useful as a frame pointer.

Flags

15  bit  8  7  bit  0
 ---- ----  ---- ----
 m111 odit  sz0a 0p1c
 |    ||||  || |  | |
 |    ||||  || |  | +- Carry (CF<sup>CY</sup>)
 |    ||||  || |  +--- Parity (PF<sup>P</sup>)
 |    ||||  || +------ Auxillary Carry (AF<sup>AC</sup>)
 |    ||||  |+-------- Zero (Z)
 |    ||||  +--------- Sign (S)
 |    |||+------------ Single Step<sup>Break</sup> (TF<sup>BRK</sup>)
 |    ||+------------- Interrupt Enable (IF<sup>IE</sup>)
 |    |+-------------- Direction (DF<sup>DIR</sup>)
 |    +--------------- Overflow (OF<sup>V</sup>)
 +-------------------- Mode (MD)


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