Keypad: Difference between revisions

From WSdev Wiki
Jump to navigationJump to search
No edit summary
m (formatting)
 
(One intermediate revision by the same user not shown)
Line 1: Line 1:
The WonderSwan SoC features a 4 by 3 keypad matrix.
The WonderSwan SoC features a 4 by 3 keypad matrix.


== Scanning ==
== I/O Ports ==
 
=== Keypad Scan ($B5) ===


Scanning is done via writing to and reading from port $B5.
Scanning is done via writing to and reading from port $B5.
Line 9: Line 11:
---- ----
---- ----
.iii oooo
.iii oooo
||| ||||
  ||| ++++- Output rows (0-3)
  ||| ++++- Output rows (0-3)
  +++------ Input rows  (4-6)
  +++------ Input rows  (4-6)
</pre>
</pre>


The standard procedure is to read rows 4, 5 and 6 in order, shifting their values into one twelve-bit mask like so:
The standard procedure is to read rows controlled by bit 4, bit 5, then bit 6 in order, shifting their values into one twelve-bit mask like so:


<pre>
<pre>
15     bit       0
15 bit 8  7  bit  0
---- ---- ---- ----
---- ---- ---- ----
.... 4444 5555 6666
.... 4444 5555 6666
</pre>
</pre>


Line 71: Line 74:


<pre>
<pre>
15     bit       0
15 bit 8  7  bit  0
---- ---- ---- ----
---- ---- ---- ----
.... yyyy xxxx bas.
.... yyyy xxxx bas.
    |||| |||| ||+- Start
      |||| |||| |||
    |||| |||| |+-- A
      ||||  |||| ||+- Start
    |||| |||| +--- B
      |||| |||| |+-- A
    |||| ++++----- X4, X3, X2, X1
      |||| |||| +--- B
    ++++---------- Y4, Y3, Y2, Y1       
      |||| ++++----- X4, X3, X2, X1
      ++++----------- Y4, Y3, Y2, Y1       
</pre>
</pre>


Line 119: Line 123:


<pre>
<pre>
15     bit       0
15 bit 8  7  bit  0
---- ---- ---- ----
---- ---- ---- ----
.... pc1C re1v ud1l
.... pc1C re1v ud1l
    || | || | || +- Left
      || |  || | || |
    || | || | |+--- Down
      || | || | || +- Left
    || | || | +---- Up
      || | || | |+--- Down
    || | || +------ View
      || | || | +---- Up
    || | |+-------- Esc
      || | || +------ View
    || | +--------- Right
      || | |+-------- Esc
    || +----------- Clear
      || | +--------- Right
    |+------------- Circle
      || +----------- Clear
    +-------------- Pass
      |+------------- Circle
      +-------------- Pass
</pre>
</pre>

Latest revision as of 06:24, 25 August 2023

The WonderSwan SoC features a 4 by 3 keypad matrix.

I/O Ports

Keypad Scan ($B5)

Scanning is done via writing to and reading from port $B5.

7  bit  0
---- ----
.iii oooo
 ||| ||||
 ||| ++++- Output rows (0-3)
 +++------ Input rows  (4-6)

The standard procedure is to read rows controlled by bit 4, bit 5, then bit 6 in order, shifting their values into one twelve-bit mask like so:

15  bit  8  7  bit  0
 ---- ----  ---- ----
 .... 4444  5555 6666

Typical keypad scanning implementations introduce a delay between writing to and reading from the matrix, allowing the scanned values to stabilize. For example, one can use the DAA opcode for doing so.

Startup override

On startup, the boot ROM checks whether or not certain output rows are forced high when all input rows are disabled. This triggers a startup override prior to the boot logo:

  • Input row 0 - jump to 4000:0000,
  • Input row 1 - jump to 4000:0010.

As this override is done before boot ROM lockout, it can be used to dump the boot ROM.

Keypad arrangement

WonderSwan

Layout

    Y1
 Y4    Y2
    Y3



    X1
 X4    X2                              A
    X3       Sound Start Power      B
                    (St)

Sound and Power buttons are not exposed directly to software.

Matrix

Bit O 3    2    1    0
I     |    |    |    |
      |    |    |    |
4--- Y4 - Y3 - Y2 - Y1 -
      |    |    |    |
5--- X4 - X3 - X2 - X1 -
      |    |    |    |
6---  B -  A - St ---+--
      |    |    |    |

Bit mask

15  bit  8  7  bit  0
 ---- ----  ---- ----
 .... yyyy  xxxx bas.
      ||||  |||| |||
      ||||  |||| ||+- Start
      ||||  |||| |+-- A
      ||||  |||| +--- B
      ||||  ++++----- X4, X3, X2, X1
      ++++----------- Y4, Y3, Y2, Y1      

Pocket Challenge V2

Layout

  Power


     Esc
                                 View
   Up                                  Clear
                                       (Clr)
 Lft Rgh                           Circle
                                    (Crc)
   Dwn                           Pass
                                (Pas)

The Power switch is not exposed directly to software.

Matrix

Bit O 3    2    1    0
I     |    |    |    |
      |    |    |    |
4--- Pas  Crc --+-- Clr -
      |    |    |    |
5--- Rgh  Esc --+- View -
      |    |    |    |
6--- Up - Dwn --+-- Lft -
      |    |    |    |
               [1]

Bit mask

15  bit  8  7  bit  0
 ---- ----  ---- ----
 .... pc1C  re1v ud1l
      || |  || | || |
      || |  || | || +- Left
      || |  || | |+--- Down
      || |  || | +---- Up
      || |  || +------ View
      || |  |+-------- Esc
      || |  +--------- Right
      || +----------- Clear
      |+------------- Circle
      +-------------- Pass