SoC: Difference between revisions

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(Created page with "The WonderSwan SoC is a single-chip solution powering the entirety of the system's hardware - containing the CPU, most peripheral logic, as well as the internal RAM. There exist three variants of the SoC: * ASWAN, used in the WonderSwan, * SPHINX, used in the WonderSwan Color, * SPHINX2, used in the SwanCrystal. A fourth variant, CAIRO, was planned. It was designed as an ASWAN with a doubled clock speed and a built-in ADPCM decoder, but was never licensed for a commer...")
 
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* SPHINX2, used in the SwanCrystal.
* SPHINX2, used in the SwanCrystal.


A fourth variant, CAIRO, was planned. It was designed as an ASWAN with a doubled clock speed and a built-in ADPCM decoder, but was never licensed for a commercial product.
A fourth variant, CAIRO, was planned<ref>[https://web.archive.org/web/20071023111112/http://www.koto.co.jp/products/mono_sp.html CAIRO グラフィックス機能内蔵ローコストSoC - Wayback Machine]</ref>. It was designed as an ASWAN with a doubled clock speed and a built-in ADPCM decoder, but is not known to have been licensed for any commercial product.


== I/O ports ==
== I/O ports ==
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|    |||+- Boot ROM lockout: 0 = off, 1 = on
|    |||+- Boot ROM lockout: 0 = off, 1 = on
|    ||+-- Color model: 0 = no, 1 = yes
|    ||+-- Color model: 0 = no, 1 = yes
|    |+--- Cartridge bus width: 0 = 8-bit, 1 = 16-bit
|    |+--- Cartridge ROM width: 0 = 8-bit, 1 = 16-bit
|    +---- Cartridge bus speed; 0 = 3 cycles, 1 = 1 cycle
|    +---- Cartridge ROM wait state: 0 = +0 cycles, 1 = +1
+--------- MBC authentication successful?
+--------- MBC authentication successful?
</pre>
</pre>
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7  bit  0
7  bit  0
---- ----
---- ----
c4C. ?.??
c4C. i?sl
|||
|||  | ||
|||  | |+- Cartridge clock speed?
||| | +-- Cartridge SRAM wait state: 0 = +0 cycles, 1 = +1
|||  +---- Cartridge I/O wait state: 0 = +0 cycles, 1 = +1
||+------- 1 = 4bpp "chunky"; requires all previous
||+------- 1 = 4bpp "chunky"; requires all previous
|+-------- 1 = 4bpp; requires all previous
|+-------- 1 = 4bpp; requires all previous
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{{Anchor|System Control 3}}
{{Anchor|System Control 3}}
=== System Control 3 ($62, color) ===
=== System Control 3 ($62, color) ===


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           1 = SwanCrystal (SPHINX2)
           1 = SwanCrystal (SPHINX2)
</pre>
</pre>
== Notes ==
<references />

Latest revision as of 11:58, 28 July 2024

The WonderSwan SoC is a single-chip solution powering the entirety of the system's hardware - containing the CPU, most peripheral logic, as well as the internal RAM.

There exist three variants of the SoC:

  • ASWAN, used in the WonderSwan,
  • SPHINX, used in the WonderSwan Color,
  • SPHINX2, used in the SwanCrystal.

A fourth variant, CAIRO, was planned[1]. It was designed as an ASWAN with a doubled clock speed and a built-in ADPCM decoder, but is not known to have been licensed for any commercial product.

I/O ports

System Control ($A0)

7  bit  0
---- ----
t??? swcl
|    ||||
|    |||+- Boot ROM lockout: 0 = off, 1 = on
|    ||+-- Color model: 0 = no, 1 = yes
|    |+--- Cartridge ROM width: 0 = 8-bit, 1 = 16-bit
|    +---- Cartridge ROM wait state: 0 = +0 cycles, 1 = +1
+--------- MBC authentication successful?

System Control 2 ($60, color)

7  bit  0
---- ----
c4C. i?sl
|||  | ||
|||  | |+- Cartridge clock speed?
|||  | +-- Cartridge SRAM wait state: 0 = +0 cycles, 1 = +1
|||  +---- Cartridge I/O wait state: 0 = +0 cycles, 1 = +1
||+------- 1 = 4bpp "chunky"; requires all previous
|+-------- 1 = 4bpp; requires all previous
+--------- 0 = mono, 1 = color; also controls access
           to WSC-specific features (extra RAM, DMA, etc.)

System Control 3 ($62, color)

7  bit  0
---- ----
S... ...p
|       |
|       +- 1 = Power off system
+--------- 0 = WonderSwan Color (SPHINX)
           1 = SwanCrystal (SPHINX2)

Notes