DMA

The WonderSwan Color introduced two DMA blocks:

• General DMA (GDMA) - allowing for fast IRAM/ROM -> IRAM transfers,
• Sound DMA (SDMA) - allowing for IRAM/ROM -> sound transfers in a much less CPU-intensive way than an interrupt.

General DMA

The CPU is stalled immediately after General DMA is enabled; the enable bit is cleared after a completed GDMA operation.

General DMA takes (5 + 2 * words) cycles to complete, where words is the number of words (2-bytes) transferred.

General DMA allows source addresses which can be accessed with a 16-bit width and without waitstates; any attempt to access SRAM (8-bit width) or "slow" ROM ($A0 bit 3 set) will cause DMA to immediately return, even if in the middle of processing a transfer.

Note that the 5-cycle cost is not spent for DMA requests for invalid addresses or of length zero; such scenarios take up no cycles.

GDMA Source Address ($40, $41, $42)

23  bit  16 15  bit  8   7  bit  0
 ---- ----   ---- ----   ---- ----
 .... hhhh   llll llll   llll lll.
      ||||   |||| ||||   |||| |||
      ++++---++++-++++---++++-++++- Linear source address
                                    ($00000 - $FFFFE)

GDMA Destination Address ($44, $45)

15  bit  8  7  bit  0
 ---- ----  ---- ----
 aaaa aaaa  aaaa aaa.
 |||| ||||  |||| |||
 ++++-++++--++++-+++-- Destination address in IRAM

GDMA allows destination addresses in IRAM.

GDMA Length ($46, $47)

15  bit  8  7  bit  0
 ---- ----  ---- ----
 bbbb bbbb  bbbb bbb.
 |||| ||||  |||| |||
 ++++-++++--++++-+++-- Transfer length, in words
                       (if including bit 0: in bytes)

GDMA Control ($48)

7  bit  0
---- ----
ed.. ....
||
|+-------- Direction: 0 = increment, 1 = decrement
+--------- Enable DMA: 0 = off, 1 = on

Sound DMA

Sound DMA allows copying sample data to either Channel 2 or Hyper Voice automatically while incurring a much lower cost than that of a CPU interrupt.

Features:

• 4000, 6000, 12000, 24000 Hz sample rates.
• Auto-repeat: If enabled, every time the length counter reaches 0, a shadowed copy of the offset and length as written to the I/O ports will be restored. If disabled, bit 7 will automatically clear on transfer completion, same as with General DMA.
• Holding: If enabled, the offset/length counters will be paused, and $00 will be written on every Sound DMA tick as opposed to the value in memory. This does not impact the timing of Sound DMA.

When playing back sound, the visible ports ($4A-$4C, $4E-$50) are the ones updated live; any edits to them are reflected immediately, as well as written to the shadow copy used for auto-repeat.

The enable/disable bit of Sound DMA does not affect the offset/length counters in any way; for example, if a sample is stopped mid-playthrough, then started again, it will pick up right where it left off.

Unlike General DMA, Sound DMA copies data per byte. This means that SRAM is supported as an input source. Also unlike General DMA, streaming from "slow" (>1 cycle) locations is supported; doing so lengthens the duration of Sound DMA. Due to its need to access the external cartridge bus, Sound DMA must use cycles normally reserved for the CPU; it uses 6 + N cycles every 128 cycles, always starting from cycle 117 mod 128. N refers to the access time of the area from which audio is being streamed from, and is typically 1 cycle.

SDMA Source Address ($4A, $4B, $4C)

23  bit  16 15  bit  8   7  bit  0
 ---- ----   ---- ----   ---- ----
 .... hhhh   llll llll   llll llll
      ||||   |||| ||||   |||| ||||
      ++++---++++-++++---++++-++++- Linear source address
                                  ($00000 - $FFFFF)

Upon writing to any of the bytes, said byte (and only said byte) is copied to a shadow register, used for restoring the offset/length counter when auto-repeat is enabled.

SDMA Length ($4E, $4F, $50)

23  bit  16 15  bit  8   7  bit  0
 ---- ----   ---- ----   ---- ----
 .... hhhh   llll llll   llll llll
      ||||   |||| ||||   |||| ||||
      ++++---++++-++++---++++-++++- Transfer length, in bytes

Upon writing to any of the bytes, said byte (and only said byte) is copied to a shadow register, used for restoring the offset/length counter when auto-repeat is enabled.

SDMA Control ($52)

7  bit  0
---- ----
ed.t rhff
|| | ||||
|| | ||++- Frequency/Rate:
|| | ||      0 = 24000/6 =  4000 Hz
|| | ||      1 = 24000/4 =  6000 Hz
|| | ||      2 = 24000/2 = 12000 Hz
|| | ||      3 = 24000/1 = 24000 Hz
|| | |+--- Hold: 0 = normal playback, 1 = hold
|| | +---- Repeat: 0 = one-shot, 1 = auto-repeat
|| +------ Target:
||           0 = Channel 2 (port $89)
||           1 = Hyper Voice
|+-------- Direction: 0 = increment, 1 = decrement
+--------- Enable DMA: 0 = off, 1 = on