SoC: Revision history

28 July 2024

• curprev 11:5811:58, 28 July 2024‎ Asie talk contribs‎ m 1,789 bytes +18‎ No edit summary

22 December 2023

• curprev 12:0312:03, 22 December 2023‎ Asie talk contribs‎ 1,771 bytes 0‎ No edit summary

1 September 2023

• curprev 14:1614:16, 1 September 2023‎ Asie talk contribs‎ 1,771 bytes +35‎ hint at $60 bit 0

30 August 2023

• curprev 18:4218:42, 30 August 2023‎ Asie talk contribs‎ 1,736 bytes +60‎ →‎System Control 2 ($60, color): document bit 3

29 August 2023

• curprev 21:5221:52, 29 August 2023‎ Asie talk contribs‎ 1,676 bytes +66‎ document port $60 bit 1
• curprev 21:4221:42, 29 August 2023‎ Asie talk contribs‎ 1,610 bytes 0‎ un-swap cartridge bus speed

27 August 2023

• curprev 11:0411:04, 27 August 2023‎ Asie talk contribs‎ 1,610 bytes +203‎ add CAIRO reference

25 August 2023

• curprev 16:5516:55, 25 August 2023‎ Asie talk contribs‎ 1,407 bytes +1,407‎ Created page with "The WonderSwan SoC is a single-chip solution powering the entirety of the system's hardware - containing the CPU, most peripheral logic, as well as the internal RAM. There exist three variants of the SoC: * ASWAN, used in the WonderSwan, * SPHINX, used in the WonderSwan Color, * SPHINX2, used in the SwanCrystal. A fourth variant, CAIRO, was planned. It was designed as an ASWAN with a doubled clock speed and a built-in ADPCM decoder, but was never licensed for a commer..."